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Re: [Xen-ia64-devel] [PATCH] Fix a bug for XEN_VIRT_UC_BIT use.

To: "Zhang, Xiantao" <xiantao.zhang@xxxxxxxxx>
Subject: Re: [Xen-ia64-devel] [PATCH] Fix a bug for XEN_VIRT_UC_BIT use.
From: Isaku Yamahata <yamahata@xxxxxxxxxxxxx>
Date: Mon, 17 Nov 2008 12:46:58 +0900
Cc: "xen-ia64-devel@xxxxxxxxxxxxxxxxxxx" <xen-ia64-devel@xxxxxxxxxxxxxxxxxxx>
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Hi. This patch itself looks okay.

Just for confirming. This patch doesn't affect the
result because the following line sees only the lsb 0 bit
of r18. Correct?

    extr.u r18=r16,XEN_VIRT_UC_BIT, 15    // extract UC bit
...
    dep r19=r18,r19,4,1 // set bit 4 (uncached) if the access was to UC region


On Mon, Nov 17, 2008 at 11:20:49AM +0800, Zhang, Xiantao wrote:
> Fix a bug for XEN_VIRT_UC_BIT use.
> 
> Signed-off-by : Zhang Xiantao <xiantao.zhang@xxxxxxxxx>
> 
> diff -r 9bc00e9716cd xen/arch/ia64/vmx/vmx_ivt.S
> --- a/xen/arch/ia64/vmx/vmx_ivt.S     Fri Nov 07 19:34:59 2008 +0900
> +++ b/xen/arch/ia64/vmx/vmx_ivt.S     Mon Nov 17 11:12:58 2008 +0800
> @@ -314,7 +314,7 @@ vmx_alt_itlb_miss_vmm:
>      movl r19=(((1 << IA64_MAX_PHYS_BITS) - 1) & ~0xfff)
>      ;;
>      and r19=r19,r16     // clear ed, reserved bits, and PTE control bits
> -    extr.u r18=r16,XEN_VIRT_UC_BIT, 15    // extract UC bit
> +    extr.u r18=r16,XEN_VIRT_UC_BIT, 1    // extract UC bit
>      ;;
>      or r19=r17,r19      // insert PTE control bits into r19
>      mov r20=IA64_GRANULE_SHIFT<<2

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> Xen-ia64-devel mailing list
> Xen-ia64-devel@xxxxxxxxxxxxxxxxxxx
> http://lists.xensource.com/xen-ia64-devel

-- 
yamahata

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