diff -r 3cc84775d725 extras/mini-os/Makefile
--- a/extras/mini-os/Makefile	Tue Feb 12 17:04:32 2008 +0000
+++ b/extras/mini-os/Makefile	Wed Feb 13 12:04:23 2008 +0000
@@ -18,7 +18,7 @@ include minios.mk
 # CFLAGS += -DBLKTEST_WRITE
 
 # Define some default flags for linking.
-LDLIBS := 
+LDLIBS := -lgcc
 LDARCHLIB := -L$(TARGET_ARCH_DIR) -l$(ARCH_LIB_NAME)
 LDFLAGS_FINAL := -T $(TARGET_ARCH_DIR)/minios-$(XEN_TARGET_ARCH).lds
 
@@ -100,7 +100,7 @@ endif
 endif
 
 $(TARGET): links $(OBJS) arch_lib
-	$(LD) -r $(LDFLAGS) $(HEAD_OBJ) $(OBJS) $(LDARCHLIB) $(LDLIBS) -o $@.o
+	$(CC) -r -nostdlib -Wl,-warn-common $(LDFLAGS) $(HEAD_OBJ) $(OBJS) $(LDARCHLIB) $(LDLIBS) -o $@.o
 	$(OBJCOPY) -w -G $(GLOBAL_PREFIX)* -G _start $@.o $@.o
 	$(LD) $(LDFLAGS) $(LDFLAGS_FINAL) $@.o $(EXTRA_OBJS) -o $@
 	gzip -f -9 -c $@ >$@.gz
diff -r 3cc84775d725 extras/mini-os/arch/ia64/Makefile
--- a/extras/mini-os/arch/ia64/Makefile	Tue Feb 12 17:04:32 2008 +0000
+++ b/extras/mini-os/arch/ia64/Makefile	Wed Feb 13 12:04:23 2008 +0000
@@ -21,9 +21,6 @@ ARCH_SRCS += debug.c
 ARCH_SRCS += debug.c
 ARCH_SRCS += sched.c
 ARCH_SRCS += xencomm.c
-ARCH_SRCS += __umoddi3.S
-ARCH_SRCS += __udivdi3.S
-ARCH_SRCS += __divdi3.S
 
 ARCH_OBJS := sal.o
 ARCH_OBJS += efi.o
@@ -36,10 +33,6 @@ ARCH_OBJS += debug.o
 ARCH_OBJS += debug.o
 ARCH_OBJS += sched.o
 ARCH_OBJS += xencomm.o
-ARCH_OBJS += __umoddi3.o
-ARCH_OBJS += __udivdi3.o
-ARCH_OBJS += __udivsi3.o
-ARCH_OBJS += __divdi3.o
 
 GEN_OFF_SRC := gen_off.c
 GEN_OFF_ASM := gen_off.s
diff -r 3cc84775d725 extras/mini-os/arch/ia64/__divdi3.S
--- a/extras/mini-os/arch/ia64/__divdi3.S	Tue Feb 12 17:04:32 2008 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,141 +0,0 @@
-.file "__divdi3.s"
-
-// $FreeBSD: src/sys/libkern/ia64/__divdi3.S,v 1.1 2000/10/04 17:53:03 dfr Exp $
-//  
-// Copyright (c) 2000, Intel Corporation
-// All rights reserved.
-//
-// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, 
-// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, 
-// Intel Corporation.
-//
-// WARRANTY DISCLAIMER
-//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
-// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS 
-// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
-// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
-// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
-// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
-// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
-// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-// Intel Corporation is the author of this code, and requests that all
-// problem reports or change requests be submitted to it directly at
-// http://developer.intel.com/opensource.
-//
-
-.section .text
-.proc __divdi3#
-.align 32
-.global __divdi3#
-.align 32
-
-// 64-bit signed integer divide
-
-__divdi3:
-
-{ .mii
-  alloc r31=ar.pfs,2,0,0,0
-  nop.i 0
-  nop.i 0;;
-} { .mmi
-
-  // 64-BIT SIGNED INTEGER DIVIDE BEGINS HERE
-
-  setf.sig f8=r32
-  setf.sig f9=r33
-  nop.i 0;;
-} { .mfb
-  nop.m 0
-  fcvt.xf f6=f8
-  nop.b 0
-} { .mfb
-  nop.m 0
-  fcvt.xf f7=f9
-  nop.b 0;;
-} { .mfi
-  nop.m 0
-  // Step (1)
-  // y0 = 1 / b in f8
-  frcpa.s1 f8,p6=f6,f7
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (2)
-  // e0 = 1 - b * y0 in f9
-  (p6) fnma.s1 f9=f7,f8,f1
-  nop.i 0
-} { .mfi
-  nop.m 0
-  // Step (3)
-  // q0 = a * y0 in f10
-  (p6) fma.s1 f10=f6,f8,f0
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (4)
-  // e1 = e0 * e0 in f11
-  (p6) fma.s1 f11=f9,f9,f0
-  nop.i 0
-} { .mfi
-  nop.m 0
-  // Step (5)
-  // q1 = q0 + e0 * q0 in f10
-  (p6) fma.s1 f10=f9,f10,f10
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (6)
-  // y1 = y0 + e0 * y0 in f8
-  (p6) fma.s1 f8=f9,f8,f8
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (7)
-  // q2 = q1 + e1 * q1 in f9
-  (p6) fma.s1 f9=f11,f10,f10
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (8)
-  // y2 = y1 + e1 * y1 in f8
-  (p6) fma.s1 f8=f11,f8,f8
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (9)
-  // r2 = a - b * q2 in f10
-  (p6) fnma.s1 f10=f7,f9,f6
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (10)
-  // q3 = q2 + r2 * y2 in f8
-  (p6) fma.s1 f8=f10,f8,f9
-  nop.i 0;;
-} { .mfb
-  nop.m 0
-  // Step (11)
-  // q = trunc (q3)
-  fcvt.fx.trunc.s1 f8=f8
-  nop.b 0;;
-} { .mmi
-  // quotient will be in r8 (if b != 0)
-  getf.sig r8=f8
-  nop.m 0
-  nop.i 0;;
-}
-
-  // 64-BIT SIGNED INTEGER DIVIDE ENDS HERE
-
-{ .mmb
-  nop.m 0
-  nop.m 0
-  br.ret.sptk b0;;
-}
-
-.endp __divdi3
diff -r 3cc84775d725 extras/mini-os/arch/ia64/__udivdi3.S
--- a/extras/mini-os/arch/ia64/__udivdi3.S	Tue Feb 12 17:04:32 2008 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,142 +0,0 @@
-.file "__udivdi3.s"
-
-// $FreeBSD: src/sys/libkern/ia64/__udivdi3.S,v 1.1 2000/10/04 17:53:03 dfr Exp $
-//  
-// Copyright (c) 2000, Intel Corporation
-// All rights reserved.
-//
-// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, 
-// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, 
-// Intel Corporation.
-//
-// WARRANTY DISCLAIMER
-//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
-// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS 
-// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
-// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
-// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
-// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
-// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
-// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-// Intel Corporation is the author of this code, and requests that all
-// problem reports or change requests be submitted to it directly at
-// http://developer.intel.com/opensource.
-//
-
-.section .text
-.proc __udivdi3#
-.align 32
-.global __udivdi3#
-.align 32
-
-// 64-bit unsigned integer divide
-
-__udivdi3:
-
-{ .mii
-  alloc r31=ar.pfs,2,0,0,0
-  nop.i 0
-  nop.i 0;;
-}
-
-{ .mmi
-
-  // 64-BIT UNSIGNED INTEGER DIVIDE BEGINS HERE
-
-  setf.sig f8=r32
-  setf.sig f9=r33
-  nop.i 0;;
-} { .mfb
-  nop.m 0
-  fma.s1 f6=f8,f1,f0
-  nop.b 0
-} { .mfb
-  nop.m 0
-  fma.s1 f7=f9,f1,f0
-  nop.b 0;;
-} { .mfi
-  nop.m 0
-  // Step (1)
-  // y0 = 1 / b in f8
-  frcpa.s1 f8,p6=f6,f7
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (2)
-  // e0 = 1 - b * y0 in f9
-  (p6) fnma.s1 f9=f7,f8,f1
-  nop.i 0
-} { .mfi
-  nop.m 0
-  // Step (3)
-  // q0 = a * y0 in f10
-  (p6) fma.s1 f10=f6,f8,f0
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (4)
-  // e1 = e0 * e0 in f11
-  (p6) fma.s1 f11=f9,f9,f0
-  nop.i 0
-} { .mfi
-  nop.m 0
-  // Step (5)
-  // q1 = q0 + e0 * q0 in f10
-  (p6) fma.s1 f10=f9,f10,f10
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (6)
-  // y1 = y0 + e0 * y0 in f8
-  (p6) fma.s1 f8=f9,f8,f8
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (7)
-  // q2 = q1 + e1 * q1 in f9
-  (p6) fma.s1 f9=f11,f10,f10
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (8)
-  // y2 = y1 + e1 * y1 in f8
-  (p6) fma.s1 f8=f11,f8,f8
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (9)
-  // r2 = a - b * q2 in f10
-  (p6) fnma.s1 f10=f7,f9,f6
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (10)
-  // q3 = q2 + r2 * y2 in f8
-  (p6) fma.s1 f8=f10,f8,f9
-  nop.i 0;;
-} { .mfb
-  nop.m 0
-  // (11) q = trunc(q3)
-  fcvt.fxu.trunc.s1 f8=f8
-  nop.b 0;;
-} { .mmi
-  // quotient will be in r8 (if b != 0)
-  getf.sig r8=f8
-  nop.m 0
-  nop.i 0;;
-}
-
-  // 64-BIT UNSIGNED INTEGER DIVIDE ENDS HERE
-
-{ .mmb
-  nop.m 0
-  nop.m 0
-  br.ret.sptk b0;;
-}
-
-.endp __udivdi3
diff -r 3cc84775d725 extras/mini-os/arch/ia64/__udivsi3.S
--- a/extras/mini-os/arch/ia64/__udivsi3.S	Tue Feb 12 17:04:32 2008 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,124 +0,0 @@
-.file "__udivsi3.s"
-
-// $FreeBSD: src/sys/libkern/ia64/__udivsi3.S,v 1.1.8.1 2005/01/31 23:26:21 imp Exp $
-
-//-
-// Copyright (c) 2000, Intel Corporation
-// All rights reserved.
-//
-// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, 
-// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, 
-// Intel Corporation.
-//
-// WARRANTY DISCLAIMER
-//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
-// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS 
-// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
-// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
-// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
-// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
-// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
-// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-// Intel Corporation is the author of this code, and requests that all
-// problem reports or change requests be submitted to it directly at
-// http://developer.intel.com/opensource.
-//
-
-.section .text
-
-// 32-bit unsigned integer divide
-
-.proc __udivsi3#
-.align 32
-.global __udivsi3#
-.align 32
-
-__udivsi3:
-
-{ .mii
-  alloc r31=ar.pfs,2,0,0,0
-  nop.i 0
-  nop.i 0;;
-} { .mii
-  nop.m 0
-
-  // 32-BIT UNSIGNED INTEGER DIVIDE BEGINS HERE
-
-  // general register used:
-  //    r32 - 32-bit unsigned integer dividend
-  //    r33 - 32-bit unsigned integer divisor
-  //    r8 - 32-bit unsigned integer result
-  //    r2 - scratch register
-  // floating-point registers used: f6, f7, f8, f9
-  // predicate registers used: p6
-
-  zxt4 r32=r32
-  zxt4 r33=r33;;
-} { .mmb
-  setf.sig f6=r32
-  setf.sig f7=r33
-  nop.b 0;;
-} { .mfi
-  nop.m 0
-  fcvt.xf f6=f6
-  nop.i 0
-} { .mfi
-  nop.m 0
-  fcvt.xf f7=f7
-  mov r2 = 0x0ffdd;;
-} { .mfi
-  setf.exp f9 = r2
-  // (1) y0
-  frcpa.s1 f8,p6=f6,f7
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // (2) q0 = a * y0
-  (p6) fma.s1 f6=f6,f8,f0
-  nop.i 0
-} { .mfi
-  nop.m 0
-  // (3) e0 = 1 - b * y0
-  (p6) fnma.s1 f7=f7,f8,f1
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // (4) q1 = q0 + e0 * q0
-  (p6) fma.s1 f6=f7,f6,f6
-  nop.i 0
-} { .mfi
-  nop.m 0
-  // (5) e1 = e0 * e0 + 2^-34
-  (p6) fma.s1 f7=f7,f7,f9
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // (6) q2 = q1 + e1 * q1
-  (p6) fma.s1 f8=f7,f6,f6
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // (7) q = trunc(q2)
-  fcvt.fxu.trunc.s1 f8=f8
-  nop.i 0;;
-} { .mmi
-  // quotient will be in the least significant 32 bits of r8 (if b != 0)
-  getf.sig r8=f8
-  nop.m 0
-  nop.i 0;;
-}
-
-  // 32-BIT UNSIGNED INTEGER DIVIDE ENDS HERE
-
-{ .mmb
-  nop.m 0
-  nop.m 0
-  br.ret.sptk b0;;
-}
-
-.endp __udivsi3
diff -r 3cc84775d725 extras/mini-os/arch/ia64/__umoddi3.S
--- a/extras/mini-os/arch/ia64/__umoddi3.S	Tue Feb 12 17:04:32 2008 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,154 +0,0 @@
-.file "__umoddi3.s"
-
-// $FreeBSD: src/sys/libkern/ia64/__umoddi3.S,v 1.3 2003/02/11 20:15:11 schweikh Exp $
-//  
-// Copyright (c) 2000, Intel Corporation
-// All rights reserved.
-//
-// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, 
-// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, 
-// Intel Corporation.
-//
-// WARRANTY DISCLAIMER
-//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
-// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS 
-// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
-// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
-// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
-// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
-// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
-// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-// Intel Corporation is the author of this code, and requests that all
-// problem reports or change requests be submitted to it directly at
-// http://developer.intel.com/opensource.
-//
-
-.section .text
-
-  // 64-bit unsigned integer remainder
-
-.proc __umoddi3#
-.align 32
-.global __umoddi3#
-.align 32
-
-__umoddi3:
-
-{ .mii
-  alloc r31=ar.pfs,3,0,0,0
-  nop.i 0
-  nop.i 0
-} { .mmb
-
-  // 64-BIT UNSIGNED INTEGER REMAINDER BEGINS HERE
-
-  // general register used:
-  //    r32 - 64-bit unsigned integer dividend, called a below
-  //    r33 - 64-bit unsigned integer divisor, called b below
-  //    r8 - 64-bit unsigned integer result
-  // floating-point registers used: f6, f7, f8, f9, f10, f11, f12
-  // predicate registers used: p6
-
-  setf.sig f12=r32  // holds a in integer form
-  setf.sig f7=r33
-  nop.b 0;;
-} { .mfi
-  // get 2s complement of b
-  sub r33=r0,r33
-  fcvt.xuf.s1 f6=f12
-  nop.i 0
-} { .mfi
-  nop.m 0
-  fcvt.xuf.s1 f7=f7
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (1)
-  // y0 = 1 / b in f8
-  frcpa.s1 f8,p6=f6,f7
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (2)
-  // q0 = a * y0 in f10
-  (p6) fma.s1 f10=f6,f8,f0
-  nop.i 0
-} { .mfi
-  nop.m 0
-  // Step (3)
-  // e0 = 1 - b * y0 in f9
-  (p6) fnma.s1 f9=f7,f8,f1
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (4)
-  // q1 = q0 + e0 * q0 in f10
-  (p6) fma.s1 f10=f9,f10,f10
-  nop.i 0
-} { .mfi
-  nop.m 0
-  // Step (5)
-  // e1 = e0 * e0 in f11
-  (p6) fma.s1 f11=f9,f9,f0
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (6)
-  // y1 = y0 + e0 * y0 in f8
-  (p6) fma.s1 f8=f9,f8,f8
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (7)
-  // q2 = q1 + e1 * q1 in f9
-  (p6) fma.s1 f9=f11,f10,f10
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (8)
-  // y2 = y1 + e1 * y1 in f8
-  (p6) fma.s1 f8=f11,f8,f8
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // Step (9)
-  // r2 = a - b * q2 in f10
-  (p6) fnma.s1 f10=f7,f9,f6
-  nop.i 0;;
-} { .mfi
-  // f7=-b
-  setf.sig f7=r33
-  // Step (10)
-  // q3 = q2 + r2 * y2 in f8
-  (p6) fma.s1 f8=f10,f8,f9
-  nop.i 0;;
-} { .mfi
-  nop.m 0
-  // (11) q = trunc(q3)
-  fcvt.fxu.trunc.s1 f8=f8
-  nop.i 0;;
-}  { .mfi
-  nop.m 0
-  // (12) r = a + (-b) * q
-  xma.l f8=f8,f7,f12
-  nop.i 0;;
-}  { .mib
-  getf.sig r8=f8
-  nop.i 0
-  nop.b 0
-}
-
-  // 64-BIT UNSIGNED INTEGER REMAINDER ENDS HERE
-
-{ .mib
-  nop.m 0
-  nop.i 0
-  br.ret.sptk b0;;
-}
-
-.endp __umoddi3
diff -r 3cc84775d725 extras/mini-os/arch/ia64/arch.mk
--- a/extras/mini-os/arch/ia64/arch.mk	Tue Feb 12 17:04:32 2008 +0000
+++ b/extras/mini-os/arch/ia64/arch.mk	Wed Feb 13 12:04:23 2008 +0000
@@ -1,13 +1,11 @@
 # Build for Big Endian?
 BIGENDIAN ?= n
 
-ARCH_CFLAGS := -mfixed-range=f2-f5,f12-f15,f32-f127 -mconstant-gp
+ARCH_CFLAGS := -mfixed-range=f2-f5,f12-f15,f32-f127
 ARCH_CFLAGS += -O2
 ARCH_ASFLAGS := -x assembler-with-cpp
 ARCH_ASFLAGS += -mfixed-range=f2-f5,f12-f15,f32-f127 -fomit-frame-pointer
-ARCH_ASFLAGS += -fno-builtin -fno-common -fno-strict-aliasing -mconstant-gp
-
-ARCH_LDFLAGS = -warn-common
+ARCH_ASFLAGS += -fno-builtin -fno-common -fno-strict-aliasing
 
 # Next lines are for big endian code !
 ifeq ($(BIGENDIAN),y)