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xen-ia64-devel
Re: [Xen-ia64-devel] [PATCH] add support for hvm live migration
On Thu, Feb 14, 2008 at 01:21:34PM +0900, Kouya Shimura wrote:
> The fault address must be on a TLB when a dirty bit fault is generated.
> So I believe that a tlb miss of tpa never happen at this point
> as long as IVT is mapped by a TR.
I don't think it is warrantied by the ASDM, although failure cases must be
extremely rare.
Tristan.
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