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xen-ia64-devel

RE: [Xen-ia64-devel] VTD is coming

To: "Xu, Anthony" <anthony.xu@xxxxxxxxx>, "Isaku Yamahata" <yamahata@xxxxxxxxxxxxx>
Subject: RE: [Xen-ia64-devel] VTD is coming
From: "Xu, Anthony" <anthony.xu@xxxxxxxxx>
Date: Fri, 11 May 2007 13:28:05 +0800
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Thread-topic: [Xen-ia64-devel] VTD is coming
>Maybe when EPT/NPT is introduced, P2M, EPT and VTD share the same page table.
>I don’t know the detail about EPT
>

BTW, there is no EPT/NPT in IPF due to different architecture.

Thanks,
Anthony


>-----Original Message-----
>From: xen-ia64-devel-bounces@xxxxxxxxxxxxxxxxxxx
>[mailto:xen-ia64-devel-bounces@xxxxxxxxxxxxxxxxxxx] On Behalf Of Xu, Anthony
>Sent: 2007年5月11日 13:13
>To: Isaku Yamahata
>Cc: xen-ia64-devel@xxxxxxxxxxxxxxxxxxx
>Subject: RE: [Xen-ia64-devel] VTD is coming
>
>>From: Isaku Yamahata [mailto:yamahata@xxxxxxxxxxxxx]
>>Sent: 2007年5月11日 11:10
>>To: Xu, Anthony
>>Cc: xen-ia64-devel@xxxxxxxxxxxxxxxxxxx
>>Subject: Re: [Xen-ia64-devel] VTD is coming
>>
>>On Fri, May 11, 2007 at 10:44:48AM +0800, Xu, Anthony wrote:
>>
>>> >Do you mean nexted page table(NPT) by 'processor page table'?
>>> Processor page table refers to shadow page table which is used to emulate
>guest
>>> page table, this is not related to NPT.
>>
>>I meant EPT(Extended Page tables) in Intel terminology.
>>Probably I need to read VT-d spec more carefully.
>>
>I know EPT, I don't mean that.
>
>When guest is protect mode with paging disabled.
>Linear address is equal to physical address.
>At this time, xen temporarily refers P2M as shadow page table (machine cr3 is
>pointing this page table) to emulate this mode. And there is another dedicate
>shadow page table to emulate protect mode with paging enabled.
>
>Maybe when EPT/NPT is introduced, P2M, EPT and VTD share the same page table.
>I don’t know the detail about EPT
>
>
>
>
>>
>>VT-d spec says only 4bits in vtd page table entry are avilable
>>for software . On the other hand we're using many bits more than 4.
>>So at this moment I'm not sure which is better to unify P2M
>>with VT-d table or to have separated tables.
>>Anyhow, it would be necessary to make P2M VT-d friendly somehow.
>I'm also thinking about this issue.
>There are 4 bits, means 16 value,
>I think it is enough; currently we only use less 10 values.
>We can compact these into 4 bits
>
>Thanks,
>Anthony
>
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