RE: FW: [Xen-ia64-devel] Good projects for someone

["Yang, Fred" <fred.yang@xxxxxxxxx>]

"Oops!" message from Domain0 with CONFIG_XEN_SMP is always there but yet to 
root cause it.
The message should be left as is to encourge community to root cause it.

-Fred

Magenheimer, Dan (HP Labs Fort Collins) wrote:
> I just committed this patch from Tristan and it is now
> possible to re-enable and run with CONFIG_XEN_SMP (see
> xen/include/asm-ia64/config.h).  Thanks Tristan!
> 
> I see lots of "pending guest timer before its due" messages,
> which I think are just indicating that without Kevin's
> timer fix, dom0 would freeze.  Kevin, is it OK to turn off this
> message now?  I am also seeing some Linux "Oops: timer tick
> before it's due" messages.
> 
> At some point we may want to enable CONFIG_XEN_SMP by
> default.  (It has been enabled by default on Xen/x86 for
> over a year.)
> 
> Dan
> 
>> -----Original Message-----
>> From: Tristan Gingold [mailto:Tristan.Gingold@xxxxxxxx]
>> Sent: Friday, January 13, 2006 6:34 AM
>> To: Magenheimer, Dan (HP Labs Fort Collins)
>> Subject: Re: FW: [Xen-ia64-devel] Good projects for someone
>> 
>> Le Jeudi 12 Janvier 2006 23:05, Magenheimer, Dan (HP Labs
>> Fort Collins) a
>> écrit :
>>>> Le Vendredi 06 Janvier 2006 22:13, vous avez écrit :
>>>>>> 2) Turning CONFIG_SMP on doesn't currently work because
>>>>>> the (new) routine flush_tlb_mask is unimplemented and panics.
>>>>>> Once SMP is working again, perhaps we should turn it on
>>>>>> by default?
>>>>> 
>>>>> Have you looked at this?  If it is easy to fix, it would
>>>>> be nice to get SMP working again...
>>>> 
>>>> Not yet.
>>>> 
>>>> It is currently difficult to me to work on SMP because I don't
>>>> have an ITP (ie, the machine with an ITP is busy).
>>>> I'd plan to work on SMP as soon as I have the ITP.  We are working
>>>> on this ITP issue.
>>>> 
>>>> Maybe the new routine can be written and checked easily ? If so I
>>>> can work on it now.
>>> 
>>> I'm not sure.  It looks like the routine is doing an IPI to flush
>>> the TLB on one or more processors.  Some of the places where
>>> it is called may not apply on ia64.  It may not even be necessary
>>> at all (especially before we have SMP guests).  Or it likely
>>> will be rarely necessary, but when it IS necessary will result
>>> in a crash if it's not done correctly.
>>> 
>>> How hard is it do an IPI to flush the TLB on another processor?
>>> If it's easy, we should probably just add the code to do it.
>>> If it's hard, we should look more carefully at the code to see
>>> exactly when it is necessary.
>> Humm, it is rather easy.  I should have looked on this issue before.
>> 
>> Here is the patch.
>> Note: the signed-off-by line is included in the patch.  I
>> hope this is the
>> right place.
>> 
>> Thanks.
>> See you next week.
>> 
>> Tristan.


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