APIC: record local APIC state on boot Xen does not store the boot local APIC state which leads to problems when shutting down for a kexec jump. This patch records the boot state so we can return to the boot state when kexecing. Signed-off-by: Andrew Cooper diff -r e32752440713 xen/arch/x86/apic.c --- a/xen/arch/x86/apic.c Wed Jun 15 12:02:13 2011 +0100 +++ b/xen/arch/x86/apic.c Wed Jun 15 13:30:08 2011 +0100 @@ -74,6 +74,11 @@ u8 __read_mostly apic_verbosity; static bool_t __initdata opt_x2apic = 1; boolean_param("x2apic", opt_x2apic); +enum apic_mode apic_boot_mode = APIC_MODE_INVALID; + +/* enum apic_mode -> str function for logging/debug */ +static const char * apic_mode_to_str(const enum apic_mode); + bool_t __read_mostly x2apic_enabled = 0; bool_t __read_mostly directed_eoi_enabled = 0; @@ -1438,6 +1443,62 @@ int __init APIC_init_uniprocessor (void) return 0; } +/* Needs to be called during startup. It records the state the BIOS + * leaves the local APIC so we can undo upon kexec. + */ +void __init record_boot_APIC_mode(void) +{ + /* Sanity check - we should only ever run once, but could possibly + * be called several times */ + if ( APIC_MODE_INVALID != apic_boot_mode ) + return; + + apic_boot_mode = current_local_apic_mode(); + + apic_printk(APIC_DEBUG, "APIC boot state is '%s'\n", + apic_mode_to_str(apic_boot_mode)); +} + +/* Look at the bits in MSR_IA32_APICBASE and work out which + * APIC mode we are in */ +enum apic_mode current_local_apic_mode(void) +{ + u64 msr_contents; + + rdmsrl(MSR_IA32_APICBASE, msr_contents); + + /* Reading EXTD bit from the MSR is only valid if CPUID + * says so, else reserved */ + if ( cpu_has(¤t_cpu_data, X86_FEATURE_X2APIC) + && (msr_contents & MSR_IA32_APICBASE_EXTD) ) + return APIC_MODE_X2APIC; + + /* EN bit should always be valid as long as we can read the MSR + */ + if ( msr_contents & MSR_IA32_APICBASE_ENABLE ) + return APIC_MODE_XAPIC; + + return APIC_MODE_DISABLED; +} + + +static const char * __init apic_mode_to_str(const enum apic_mode mode) +{ + switch ( mode ) + { + case APIC_MODE_INVALID: + return "invalid"; + case APIC_MODE_DISABLED: + return "disabled"; + case APIC_MODE_XAPIC: + return "xapic"; + case APIC_MODE_X2APIC: + return "x2apic"; + default: + return "unrecognised"; + } +} + void check_for_unexpected_msi(unsigned int vector) { unsigned long v = apic_read(APIC_ISR + ((vector & ~0x1f) >> 1)); diff -r e32752440713 xen/arch/x86/genapic/probe.c --- a/xen/arch/x86/genapic/probe.c Wed Jun 15 12:02:13 2011 +0100 +++ b/xen/arch/x86/genapic/probe.c Wed Jun 15 13:30:08 2011 +0100 @@ -60,6 +60,8 @@ void __init generic_apic_probe(void) { int i, changed; + record_boot_APIC_mode(); + check_x2apic_preenabled(); cmdline_apic = changed = (genapic != NULL); diff -r e32752440713 xen/include/asm-x86/apic.h --- a/xen/include/asm-x86/apic.h Wed Jun 15 12:02:13 2011 +0100 +++ b/xen/include/asm-x86/apic.h Wed Jun 15 13:30:08 2011 +0100 @@ -21,6 +21,20 @@ #define IO_APIC_REDIR_DEST_LOGICAL 0x00800 #define IO_APIC_REDIR_DEST_PHYSICAL 0x00000 +/* Possible APIC states */ +enum apic_mode { APIC_MODE_INVALID, /* Not set yet */ + APIC_MODE_DISABLED, /* If uniprocessor, or smp in + * uniprocessor mode */ + APIC_MODE_XAPIC, /* xAPIC mode - default upon + * chipset reset */ + APIC_MODE_X2APIC /* x2APIC mode - common for large + * smp machines */ +}; + +/* Bootstrap processor local APIC boot mode - so we can undo our changes + * to the APIC state */ +extern enum apic_mode apic_boot_mode; + extern u8 apic_verbosity; extern bool_t x2apic_enabled; extern bool_t directed_eoi_enabled; @@ -203,6 +217,8 @@ extern void disable_APIC_timer(void); extern void enable_APIC_timer(void); extern int lapic_suspend(void); extern int lapic_resume(void); +extern void record_boot_APIC_mode(void); +extern enum apic_mode current_local_apic_mode(void); extern int check_nmi_watchdog (void);