Hi,
At 00:15 +0800 on 31 May (1306800954), MaoXiaoyun wrote:
> Hi:
>
> Question might be simple but really confused me a long time.
>
> In my assumption, during VM running, the CPU sees the guest code
> instruction,
> so when it want to asscess memory, it sees the guest virtual adress(GVA), so
> it need to
> first translate to guest physical adress(GPA), and then host physical
> adress(HPA), and finally
> access the real memory address.
>
> Since GPA are always needs to translated to HPA, and p2m table only
> accessable in Xen for
> HVM guest, does this mean every memory access will need VMExit to Xen?
No, that would run awfully slowly!
If the CPU has EPT/NPT support, the p2m table can be passed to the CPU along
with the guest pagetables, and the CPU does both translations. (This is
called "hap", for hardware-assisited paging, in the Xen code.) That
needs no extra VMEXITs for memory accesses, but TLB fills get a lot more
expensive.
The other way to do it is for Xen to maintain "shadow pagetables",
copies of the guest pagetables with the extra p->m translation already
applied. That involves some extra VMEXITs, basically the first time a
VA is used, and when an in-use pagetable is modified, and it needs a
bunch of memory to keep the shadows in.
The overheads of the two methods are roughly comparable; depending on
the workload it can make a few % difference either way to use shadows or
hap.
Because the code for fast shadow pagetables is quite complicated, some
of the more recent Xen features (page-sharing, paging, the new mem-event
interface) are only supported on HAP.
Cheers,
Tim.
--
Tim Deegan <Tim.Deegan@xxxxxxxxxx>
Principal Software Engineer, Xen Platform Team
Citrix Systems UK Ltd. (Company #02937203, SL9 0BG)
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