This is an archived copy of the Xen.org mailing list, which we have preserved to ensure that existing links to archives are not broken. The live archive, which contains the latest emails, can be found at http://lists.xen.org/
Home Products Support Community News


RE: [Xen-devel] [PATCH 4] MCA physical address check when calculate doma

To: Jan Beulich <JBeulich@xxxxxxxxxx>
Subject: RE: [Xen-devel] [PATCH 4] MCA physical address check when calculate domain
From: "Liu, Jinsong" <jinsong.liu@xxxxxxxxx>
Date: Tue, 10 May 2011 18:46:03 +0800
Accept-language: en-US
Acceptlanguage: en-US
Cc: "xen-devel@xxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxx>, Keir Fraser <keir.xen@xxxxxxxxx>, "Li, Xin" <xin.li@xxxxxxxxx>, "Jiang, Yunhong" <yunhong.jiang@xxxxxxxxx>
Delivery-date: Tue, 10 May 2011 03:48:18 -0700
Envelope-to: www-data@xxxxxxxxxxxxxxxxxxx
In-reply-to: <4DC9142E020000780004094D@xxxxxxxxxxxxxxxxxx>
List-help: <mailto:xen-devel-request@lists.xensource.com?subject=help>
List-id: Xen developer discussion <xen-devel.lists.xensource.com>
List-post: <mailto:xen-devel@lists.xensource.com>
List-subscribe: <http://lists.xensource.com/mailman/listinfo/xen-devel>, <mailto:xen-devel-request@lists.xensource.com?subject=subscribe>
List-unsubscribe: <http://lists.xensource.com/mailman/listinfo/xen-devel>, <mailto:xen-devel-request@lists.xensource.com?subject=unsubscribe>
References: <BC00F5384FCFC9499AF06F92E8B78A9E2075FE9CD0@xxxxxxxxxxxxxxxxxxxxxxxxxxxx> <4DC7CCF802000078000405A1@xxxxxxxxxxxxxxxxxx> <BC00F5384FCFC9499AF06F92E8B78A9E20762CE22A@xxxxxxxxxxxxxxxxxxxxxxxxxxxx> <4DC9142E020000780004094D@xxxxxxxxxxxxxxxxxx>
Sender: xen-devel-bounces@xxxxxxxxxxxxxxxxxxx
Thread-index: AcwO7Ml5VA1p+4xkTXGvn0varX4xsQACrfmg
Thread-topic: [Xen-devel] [PATCH 4] MCA physical address check when calculate domain
Jan Beulich wrote:
>>>> On 10.05.11 at 08:38, "Liu, Jinsong" <jinsong.liu@xxxxxxxxx> wrote:
>> As for physical addr, the addr in MCi_ADDR reg may be linear add/
>> physical add/ setment offset. according to Intel SDM, the addr in
>> MCi_ADDR reg is physical addr only when: 1). MISCV bit of MCi_STATUS
>> set; 2). ADDRV bit of MCi_STATUS set;
>> 3). address mode of MCi_MISC (bit 6~8) = 010;
> I realize this is what's being documented currently. Going back to the
> newest hard copy manual I still have (PentiumPro, which luckily is the
> first one where the banked implementation is described), there's no
> MCi_MISC (it's documented, but said to not be implemented on these
> old CPUs), and the description for the address reads "The address
> returned is either 32-bit virtual, 32-bit linear, or 36-bit
> physical". Now I certainly don't care much about PPro anymore, but I
> wonder when MCi_MISC was first implemented in the way your patch is
> using it. 

Seems needn't care about when MCi_MISC first implemented. MCi_STATUS_MISCV 
check can make sure accessing MCi_MISC safely.

If really want to know MCi_MISC implemented at which processor, we can use 
cpuid DF_DM as clue. 
Different MCi_MISC implemented at different DF_DM processors (refer Intel SDM, 
Appendix B).
Currently there are 22 MCi_MISC (refer Table B-2), generally
MC0~4_MISC implement for all P6 processors;
MC5_MISC after 06_0F;
MC6_MISC after 06_1D;
MC21_MISC after 06_2E;

However, if want to check exactually how many MCi_MISC reg a processor has, it 
has to check 'count' field of IA32_MCG_CAP.
Take SNB processor (refer Table B-10) as example: It only support MC0~3_MISC 
openly (this does mean it has no other MCi_MISC, but means we can use 

> Further, the current manual also makes a distinction between
> "Physical Address" and "Memory Address", and additionally has
> a "Generic" type - all without further explanation.
> Jan

Memory address is from the view of memory controller, say, channel number, as 
far as I understand. 
I don't know what 'Generic' means either.

Xen-devel mailing list