>>> On 12.04.11 at 15:59, Keir Fraser <keir@xxxxxxx> wrote:
> On 04/04/2011 10:22, "Jan Beulich" <JBeulich@xxxxxxxxxx> wrote:
>
>> Haitao, while it is quite clear that with the current
>> implementation we just can't use C states above C1 on CPUs
>> that may halt the TSC in C2 or C3 *and* that don't allow
>> writing the full TSC, this family/model based determination
>> clearly isn't nice (and since it is a white list, it can't possibly be
>> complete). An alternative would seem to be to probe for how
>> TSC writes behave (thus at once covering eventual other
>> vendors' CPUs that may have similar shortcomings). That of
>> course would need to be done early, so that resetting the
>> upper bits to zero wouldn't have any adverse effect. What
>> do you think?
>
> We should do early run-time test of this from the BSP then, on failure,
> avoid all further potential uses of write_tsc() in an appropriate way (e.g.,
> bail early in cstate_restore_tsc(), synchronize_tsc_*(), and avoid use of
> time_calibration_tsc_rendezvous()).
Okay, that matches what I have so far (just need to implement
the mechanism to suppress synchronize_tsc_*() then).
Thanks, Jan
_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-devel
|
Home