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Re: [Xen-devel] [PATCH] iomem: Prevent Dom0 pci bus from allocating RAM

To: "Zhang, Fengzhe" <fengzhe.zhang@xxxxxxxxx>
Subject: Re: [Xen-devel] [PATCH] iomem: Prevent Dom0 pci bus from allocating RAM as I/O space
From: Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx>
Date: Fri, 18 Feb 2011 17:05:59 -0500
Cc: xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxx>, "Dong, Eddie" <eddie.dong@xxxxxxxxx>, "Li, Xin" <xin.li@xxxxxxxxx>
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On Wed, Feb 16, 2011 at 10:26:20PM +0800, Zhang, Fengzhe wrote:
> iomem: Prevent Dom0 pci bus from allocating RAM as I/O space
> 
> In Dom0, pci bus dynamically allocates I/O address resources from memory hole 
> within 4GB physical space, which can be RAM space not allocated to Dom0. This 
> patch set physical RAM space to be unusable in Dom0 E820 map if they are not 
> owned by Dom0 to prevent them from being misused as I/O address space. Dom0 
> is assumed to look for MMIO space only below 4GB. If this assumption is 
> broken, additional fixes are required.

So I am coming back to your patch trying to understand how it makes
the intel-agp crash go away. What this patch in effect does is
inhibit ioremap from inadvertly mapping System RAM, which it could do
before this - b/c it considered the "zapped" System RAM (so e820->size = 0)
as gap.

But looking at the intel-agp.c code works, it seems like it wouldn't
really care about it initially. It figures out where to physical GTT is by
poking the "intel_private.registers+I810_PGETBL_CTL". Earlier we also make a
call in "agp_intel_probe" to do "pci_assign_resource(pdev, 0)" which
irregardless of this patch or not, would work (since the BARs don't change
with this patch? or do they?).

The ioremap which is done in "intel_i9xx_setup_flush" would now potentially
_not_ work since the region the GTT might be in the RAM region, and ioremap
would consult the e820 table and find it is "UNUSABLE".. We then would
continue on without the flush page with "can't ioremap flush page - no chipset 
flushing"

Is that really what this patch achieves? How is this related
to the igb driver?

Can you provide a serial output of before this patch, and after this
patch? I am really curious to see how the intel agp functions.


> 
> Signed-off-by: Fengzhe Zhang <fengzhe.zhang@xxxxxxxxx>
> 
> diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
> index 1a1934a..f1a3896 100644
> --- a/arch/x86/xen/setup.c
> +++ b/arch/x86/xen/setup.c
> @@ -189,6 +189,16 @@ char * __init xen_memory_setup(void)
>                       end -= delta;
>  
>                       extra_pages += PFN_DOWN(delta);
> +
> +                     /*
> +                      * Set RAM below 4GB that are not owned by Dom0 to be 
> unusable.
> +                      * This prevents RAM-backed address space from being 
> used as
> +                      * I/O address in Dom0. Dom0 is assumed to look for MMIO
> +                      * space only below 4GB. If this assumption is broken, 
> additional
> +                      * fixes are required.
> +                      */
> +                     if (delta && end < 0x100000000UL)
> +                             e820_add_region(end, delta, E820_UNUSABLE);
>               }
>  
>               if (map[i].size > 0 && end > xen_extra_mem_start)


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