This is an archived copy of the Xen.org mailing list, which we have preserved to ensure that existing links to archives are not broken. The live archive, which contains the latest emails, can be found at http://lists.xen.org/
Home Products Support Community News


[Xen-devel] [PATCH]: blacklist new AMD CPUID bits for PV domains

To: Keir Fraser <keir@xxxxxxx>
Subject: [Xen-devel] [PATCH]: blacklist new AMD CPUID bits for PV domains
From: Andre Przywara <andre.przywara@xxxxxxx>
Date: Tue, 25 Jan 2011 15:14:21 +0100
Cc: xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxx>
Delivery-date: Tue, 25 Jan 2011 06:18:59 -0800
Envelope-to: www-data@xxxxxxxxxxxxxxxxxxx
List-help: <mailto:xen-devel-request@lists.xensource.com?subject=help>
List-id: Xen developer discussion <xen-devel.lists.xensource.com>
List-post: <mailto:xen-devel@lists.xensource.com>
List-subscribe: <http://lists.xensource.com/mailman/listinfo/xen-devel>, <mailto:xen-devel-request@lists.xensource.com?subject=subscribe>
List-unsubscribe: <http://lists.xensource.com/mailman/listinfo/xen-devel>, <mailto:xen-devel-request@lists.xensource.com?subject=unsubscribe>
Sender: xen-devel-bounces@xxxxxxxxxxxxxxxxxxx
User-agent: Thunderbird (X11/20090820)

there are some new CPUID bits (and leaves) which Dom0 and PV domains should not see to avoid trouble, since we don't emulate the features. The most prominent one is a topology leaf, which contains information specific to the physical CPU, not the virtual one. To avoid confusion (and possibly crashes) due to a confused Dom0 scheduler simply disable these bits.

Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx>

Andre Przywara
AMD-Operating System Research Center (OSRC), Dresden, Germany
diff -r 003acf02d416 xen/arch/x86/traps.c
--- a/xen/arch/x86/traps.c      Thu Jan 20 17:04:06 2011 +0000
+++ b/xen/arch/x86/traps.c      Fri Jan 21 13:51:38 2011 +0100
@@ -802,11 +802,16 @@
         __clear_bit(X86_FEATURE_IBS % 32, &c);
         __clear_bit(X86_FEATURE_SKINIT % 32, &c);
         __clear_bit(X86_FEATURE_WDT % 32, &c);
+        __clear_bit(X86_FEATURE_LWP % 32, &c);
+        __clear_bit(X86_FEATURE_NODEID_MSR % 32, &c);
+        __clear_bit(X86_FEATURE_TOPOEXT % 32, &c);
     case 5: /* MONITOR/MWAIT */
     case 0xa: /* Architectural Performance Monitor Features */
     case 0x8000000a: /* SVM revision and features */
     case 0x8000001b: /* Instruction Based Sampling */
+    case 0x8000001c: /* Light Weight Profiling */
+    case 0x8000001e: /* Extended topology reporting */
         a = b = c = d = 0;
Xen-devel mailing list
<Prev in Thread] Current Thread [Next in Thread>