This is an archived copy of the Xen.org mailing list, which we have preserved to ensure that existing links to archives are not broken. The live archive, which contains the latest emails, can be found at http://lists.xen.org/
Home Products Support Community News


Re: [Xen-devel] Fam10+ extended config space enabling

To: Keir Fraser <keir@xxxxxxx>
Subject: Re: [Xen-devel] Fam10+ extended config space enabling
From: Robert Richter <robert.richter@xxxxxxx>
Date: Thu, 6 Jan 2011 12:47:48 +0100
Cc: "xen-devel@xxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxx>, Jan Beulich <JBeulich@xxxxxxxxxx>
Delivery-date: Tue, 11 Jan 2011 03:01:19 -0800
Envelope-to: www-data@xxxxxxxxxxxxxxxxxxx
In-reply-to: <C94B4C38.112E5%keir@xxxxxxx>
List-help: <mailto:xen-devel-request@lists.xensource.com?subject=help>
List-id: Xen developer discussion <xen-devel.lists.xensource.com>
List-post: <mailto:xen-devel@lists.xensource.com>
List-subscribe: <http://lists.xensource.com/mailman/listinfo/xen-devel>, <mailto:xen-devel-request@lists.xensource.com?subject=subscribe>
List-unsubscribe: <http://lists.xensource.com/mailman/listinfo/xen-devel>, <mailto:xen-devel-request@lists.xensource.com?subject=unsubscribe>
References: <4D25A43A020000780002AAD0@xxxxxxxxxxxxxxxxxx> <C94B4C38.112E5%keir@xxxxxxx>
Sender: xen-devel-bounces@xxxxxxxxxxxxxxxxxxx
User-agent: Mutt/1.5.20 (2009-06-14)
On 06.01.11 05:38:48, Keir Fraser wrote:
> On 06/01/2011 10:15, "Jan Beulich" <JBeulich@xxxxxxxxxx> wrote:

> > starting with 2.6.27 Linux is doing this, using MSR accesses (these
> > days in CPU hotplug notification callbacks). Is there a reason this
> > cannot be done through PCI config space writes (as the register is
> > aliased), and then only once at boot time (perhaps utilizing some
> > of the code in arch/x86/kernel/k8.c)?

>From reading the documentation this should work too. The msr controls
a Northbridge function and thus is per-node. NB function msrs are
shared between all cores on the node and there is one instance per

IIRC there were several reasons to choose msr access. During early cpu
bringup there are only some basic early pci access functions
available, requiring a little more complex code to scan NB devices. I
think in between there is code available that could be shared. Second,
if we implement the setup using pci access, we must adopt the code
with every new cpu family with new nb devices to support pci ecs with
new cpus. So, new cpus couldn't use pci ecs with an old kernel then.

But the msr 0xC001001F is not architectural. Actually this means the
assumption in the code is wrong, that all cpus from fam10h have IO
ECS. There might be future cpus not supporting it. But in practice all
current cpu families from family 10h support the msr (10h, 11h, 12h,
14h, 15h).

> > I'm particularly asking from the Xen perspective, where the MSR
> > based mechanism won't reliably work (since there's no guarantee
> > all of Dom0's virtual CPUs would, at initialization time, actually
> > cover all physical CPUs that Dom0 may ever run on).
> Just thinking, could we simply do this in Xen, either unconditionally, or as
> soon as we detect dom0 doing it for at least one CPU?

I don't know if xen is capable to emulate per-node msrs, presumable
not. I don't have an overview which other per-node msrs might be worth
to be supported by xen. If so, it might be better to implement support
for per-node msrs.

But I am fine with a setup with pci access for some nb devices, but
would rather leave the setup via msrs as a fallback.


Advanced Micro Devices, Inc.
Operating System Research Center

Xen-devel mailing list