--- xen-4.0.0/xen/arch/x86/irq.c.orig	2010-04-07 17:12:06.000000000 +0100
+++ xen-4.0.0/xen/arch/x86/irq.c	2010-08-26 20:47:13.000000000 +0100
@@ -94,8 +94,11 @@
         return 0;
     if (cfg->vector != IRQ_VECTOR_UNASSIGNED) 
         return -EBUSY;
-    for_each_cpu_mask(cpu, mask)
+    for_each_cpu_mask(cpu, mask) {
         per_cpu(vector_irq, cpu)[vector] = irq;
+	printk("__bind_irq_vector: setting vector_irq[%d]=%d for cpu=%d\n",
+               vector, irq, cpu);
+	}
     cfg->vector = vector;
     cfg->domain = domain;
     irq_status[irq] = IRQ_USED;
@@ -185,8 +188,11 @@
     vector = cfg->vector;
     cpus_and(tmp_mask, cfg->domain, cpu_online_map);
 
-    for_each_cpu_mask(cpu, tmp_mask)
+    for_each_cpu_mask(cpu, tmp_mask) {
         per_cpu(vector_irq, cpu)[vector] = -1;
+	printk("__clear_irq_vector: setting vector_irq[%d]=-1 for cpu=%d\n",
+               vector, cpu);
+	}
 
     cfg->vector = IRQ_VECTOR_UNASSIGNED;
     cpus_clear(cfg->domain);
@@ -200,6 +206,8 @@
             if (per_cpu(vector_irq, cpu)[vector] != irq)
                 continue;
             per_cpu(vector_irq, cpu)[vector] = -1;
+	printk("__clear_irq_vector2: setting vector_irq[%d]=-1 for cpu=%d\n",
+               vector, cpu);
              break;
         }
      }
@@ -401,8 +409,11 @@
             cfg->move_in_progress = 1;
             cpus_copy(cfg->old_domain, cfg->domain);
         }
-        for_each_cpu_mask(new_cpu, tmp_mask)
+        for_each_cpu_mask(new_cpu, tmp_mask) {
             per_cpu(vector_irq, new_cpu)[vector] = irq;
+	printk("__assign_irq_vector: setting vector_irq[%d]=%d for cpu=%d\n",
+               vector, irq, new_cpu);
+		}
         cfg->vector = vector;
         cpus_copy(cfg->domain, tmp_mask);
 
@@ -444,8 +455,11 @@
     struct irq_cfg *cfg;
 
     /* Clear vector_irq */
-    for (vector = 0; vector < NR_VECTORS; ++vector)
+    for (vector = 0; vector < NR_VECTORS; ++vector) {
         per_cpu(vector_irq, cpu)[vector] = -1;
+	printk("__setup_irq_vector: setting vector_irq[%d]=-1 for cpu=%d\n",
+               vector, cpu);
+	}
     /* Mark the inuse vectors */
     for (irq = 0; irq < nr_irqs; ++irq) {
         cfg = irq_cfg(irq);
@@ -453,6 +467,8 @@
             continue;
         vector = irq_to_vector(irq);
         per_cpu(vector_irq, cpu)[vector] = irq;
+	printk("__setup_irq_vector2: setting vector_irq[%d]=%d for cpu=%d\n",
+               vector, irq, cpu);
     }
 }
 
--- xen-4.0.0/xen/arch/x86/i8259.c.orig	2010-04-07 17:12:05.000000000 +0100
+++ xen-4.0.0/xen/arch/x86/i8259.c	2010-08-26 20:57:49.000000000 +0100
@@ -372,11 +372,15 @@
         
         desc->handler = &i8259A_irq_type;
         per_cpu(vector_irq, cpu)[FIRST_LEGACY_VECTOR + irq] = irq;
+	printk("i8259.c: setting vector_irq[FIRST_LEGACY_VECTOR + irq]=%d for cpu=%d\n",
+               irq, cpu);
         cfg->domain = cpumask_of_cpu(cpu);
         cfg->vector = FIRST_LEGACY_VECTOR + irq;
     }
     
     per_cpu(vector_irq, cpu)[FIRST_HIPRIORITY_VECTOR] = 0;
+	printk("i8259.c2: setting vector_irq[FIRST_HIPRIORITY_VECTOR]=0 for cpu=%d\n",
+               cpu);
 
     apic_intr_init();
 
--- xen-4.0.0/xen/arch/x86/io_apic.c.orig	2010-04-07 17:12:06.000000000 +0100
+++ xen-4.0.0/xen/arch/x86/io_apic.c	2010-08-26 21:02:52.000000000 +0100
@@ -308,6 +308,7 @@
             goto unlock;
         }
         __get_cpu_var(vector_irq)[vector] = -1;
+	printk("ioapic.c: __get_cpu_var(vector_irq)[%d] = -1 for cpu=%d ?\n", vector, me);
         cfg->move_cleanup_count--;
 unlock:
         spin_unlock(&desc->lock);
--- xen-4.0.0/xen/arch/x86/smpboot.c.orig	2010-04-07 17:12:06.000000000 +0100
+++ xen-4.0.0/xen/arch/x86/smpboot.c	2010-08-26 21:07:35.000000000 +0100
@@ -1600,6 +1600,8 @@
 			continue;
 		irq_vector[irq] = FIRST_HIPRIORITY_VECTOR + seridx + 1;
 		per_cpu(vector_irq, cpu)[FIRST_HIPRIORITY_VECTOR + seridx + 1] = irq;
+		printk("smpboot.c setting vector_irq[FIRST_HIPRIORITY_VECTOR + %d + 1]=%d for cpu=%d\n",
+	               seridx, irq, cpu);
 		irq_cfg[irq].vector = FIRST_HIPRIORITY_VECTOR + seridx + 1;
 		irq_cfg[irq].domain = (cpumask_t)CPU_MASK_ALL;
 	}