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Re: [Xen-devel] [PATCH] Fix for AMD erratum 383 on Family 10h CPUs

To: "Wei Huang" <wei.huang2@xxxxxxx>
Subject: Re: [Xen-devel] [PATCH] Fix for AMD erratum 383 on Family 10h CPUs
From: "Jan Beulich" <JBeulich@xxxxxxxxxx>
Date: Wed, 19 May 2010 12:55:16 +0100
Cc: joerg.roedel@xxxxxxx, Christoph Egger <Christoph.Egger@xxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxx, Keir Fraser <keir.fraser@xxxxxxxxxxxxx>
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>>> Wei Huang <wei.huang2@xxxxxxx> 17.05.10 20:57 >>>
>This patches implements the workaround of AMD erratum 383 on family 10h 
>CPUs. It destroys the guest VM when a MC error with a special pattern is 
>detected. Without this patch, a guest VM failure can potentially crash 
>Xen hypervisor and the whole system. The erratum will be published in 
>next version of guide.

While I realize that the patch has already been applied, I still have
some reservations:
- It fiddles with bit 47 of MSR_AMD64_DC_CFG *and* marks that the
  erratum is present. Normally I would expect that MSR modifications
  are done to work around an erratum, but here it is completely
  unclear what the modification is good for.
- It clears all MCi_STATUS registers, despite (as I understand it) the
  problem only involving bank 0.
- It flushes the TLBs for the affected domain - shouldn't this be done
  globally, if it is necessary at all?
- Is it guaranteed that the #MC cannot happen when a #VMEXIT is
  already being processed by the CPU?


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