diff -r da620c454916 -r a72e0fa4f9ad xen/arch/x86/hvm/vmx/vmx.c --- a/xen/arch/x86/hvm/vmx/vmx.c Thu Aug 13 08:40:39 2009 +0100 +++ b/xen/arch/x86/hvm/vmx/vmx.c Thu Aug 13 11:24:57 2009 +0100 @@ -943,9 +943,7 @@ v->arch.hvm_vmx.exec_control |= CPU_BASED_RDTSC_EXITING; __vmwrite(CPU_BASED_VM_EXEC_CONTROL, v->arch.hvm_vmx.exec_control); vmx_vmcs_exit(v); } - -void do_nmi(struct cpu_user_regs *); static void vmx_init_hypercall_page(struct domain *d, void *hypercall_page) { @@ -2470,7 +2468,7 @@ (X86_EVENTTYPE_NMI << 8) ) goto exit_and_crash; HVMTRACE_0D(NMI); - do_nmi(regs); /* Real NMI, vector 2: normal processing. */ + self_nmi(); /* Real NMI, vector 2: normal processing. */ break; case TRAP_machine_check: HVMTRACE_0D(MCE); diff -r da620c454916 -r a72e0fa4f9ad xen/arch/x86/nmi.c --- a/xen/arch/x86/nmi.c Thu Aug 13 08:40:39 2009 +0100 +++ b/xen/arch/x86/nmi.c Thu Aug 13 11:24:57 2009 +0100 @@ -441,16 +441,19 @@ * 8-3 and 8-4 in IA32 Reference Manual Volume 3. We send the IPI to * our own APIC ID explicitly which is valid. */ -static void do_nmi_trigger(unsigned char key) +void self_nmi(void) { u32 id = get_apic_id(); - - printk("Triggering NMI on APIC ID %x\n", id); - local_irq_disable(); apic_wait_icr_idle(); apic_icr_write(APIC_DM_NMI | APIC_DEST_PHYSICAL, id); local_irq_enable(); +} + +static void do_nmi_trigger(unsigned char key) +{ + printk("Triggering NMI on APIC ID %x\n", get_apic_id()); + self_nmi(); } static struct keyhandler nmi_trigger_keyhandler = { diff -r da620c454916 -r a72e0fa4f9ad xen/include/asm-x86/apic.h --- a/xen/include/asm-x86/apic.h Thu Aug 13 08:40:39 2009 +0100 +++ b/xen/include/asm-x86/apic.h Thu Aug 13 11:24:57 2009 +0100 @@ -196,6 +196,7 @@ extern void setup_apic_nmi_watchdog (void); extern int reserve_lapic_nmi(void); extern void release_lapic_nmi(void); +extern void self_nmi(void); extern void disable_timer_nmi_watchdog(void); extern void enable_timer_nmi_watchdog(void); extern void nmi_watchdog_tick (struct cpu_user_regs *regs);