Hi,
hvm/emulate.c sets the direction of an IO_ASSIST trace operation in an
unused bit. This bitmask was defined in the .c file, not in the public
header. Beside moving this define this patch adds the appropriate string
in the formats file.
Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx>
Regards,
Andre.
--
Andre Przywara
AMD-Operating System Research Center (OSRC), Dresden, Germany
Tel: +49 351 448 3567 12
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Advanced Micro Devices GmbH
Karl-Hammerschmidt-Str. 34, 85609 Dornach b. Muenchen
Geschaeftsfuehrer: Jochen Polster; Thomas M. McCoy; Giuliano Meroni
Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen
Registergericht Muenchen, HRB Nr. 43632
diff -r 4eef30c14a14 tools/xentrace/formats
--- a/tools/xentrace/formats Thu Apr 23 10:11:33 2009 +0100
+++ b/tools/xentrace/formats Fri Apr 24 13:50:12 2009 +0200
@@ -63,7 +63,9 @@
0x00082114 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INVLPG [ is invlpga? =
%(1)d, virt = 0x%(2)016x ]
0x00082015 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) MCE
0x00082016 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) IO_ASSIST [ data = 0x%(1)04x
]
+0x00082216 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) IO_ASSIST write [ data =
0x%(1)04x ]
0x00082017 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) MMIO_ASSIST [ data = 0x%(1)04x
]
+0x00082217 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) MMIO_ASSIST write [ data =
0x%(1)04x ]
0x00082018 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) CLTS
0x00082019 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) LMSW [ value =
0x%(1)08x ]
0x00082119 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) LMSW [ value =
0x%(1)016x ]
diff -r 4eef30c14a14 xen/arch/x86/hvm/emulate.c
--- a/xen/arch/x86/hvm/emulate.c Thu Apr 23 10:11:33 2009 +0100
+++ b/xen/arch/x86/hvm/emulate.c Fri Apr 24 13:50:12 2009 +0200
@@ -21,7 +21,6 @@
#include <asm/hvm/trace.h>
#include <asm/hvm/support.h>
-#define HVMTRACE_IO_ASSIST_WRITE 0x200
static void hvmtrace_io_assist(int is_mmio, ioreq_t *p)
{
unsigned int size, event;
diff -r 4eef30c14a14 xen/include/public/trace.h
--- a/xen/include/public/trace.h Thu Apr 23 10:11:33 2009 +0100
+++ b/xen/include/public/trace.h Fri Apr 24 13:50:12 2009 +0200
@@ -94,7 +94,11 @@
#define TRC_PV_PTWR_EMULATION (TRC_PV + 11)
#define TRC_PV_PTWR_EMULATION_PAE (TRC_PV + 12)
/* Indicates that addresses in trace record are 64 bits */
-#define TRC_64_FLAG (0x100)
+#define TRC_64_FLAG (0x100)
+ /* I/O direction flag */
+#define HVMTRACE_IO_ASSIST_WRITE (0x200)
+
+
#define TRC_SHADOW_NOT_SHADOW (TRC_SHADOW + 1)
#define TRC_SHADOW_FAST_PROPAGATE (TRC_SHADOW + 2)
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