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Re: [Xen-devel] [PATCH 0/6] MSI-INTx interrupt translation for HVM

To: Qing He <qing.he@xxxxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxx
Subject: Re: [Xen-devel] [PATCH 0/6] MSI-INTx interrupt translation for HVM
From: Shohei Fujiwara <fujiwara-sxa@xxxxxxxxxxxxxxx>
Date: Fri, 09 Jan 2009 13:26:19 +0900
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Thank you for your reply.

On Thu, 8 Jan 2009 22:52:00 +0800
Qing He <qing.he@xxxxxxxxx> wrote:

> On Thu, 2009-01-08 at 18:44 +0800, Shohei Fujiwara wrote:
> > I have one question.
> > 
> > MSI interrupt is edge-triggered, and INTx interrupt is level-triggered.
> > Guest OS handles translated interrupt as level-triggered, though physical
> > interrupt is edge-triggered. When two interrupts are raised during short
> > period, Guest OS might lose 2nd interrupt, I think.
> 
> This problem is handled by a different EOI timing. As soon as the
> hypervisor receives an MSI, it issues the EOI ASAP, and the duration of
> the injected level-triggered IRQ and guest EOI are all handled by the
> virtual APICs. If a 2nd interrupt comes up at this time, the hypervisor
> can receive the EOI and this results in a pending IRQ in virtual APICs
> instead of lost.

There is the assumption that Guest OS handles all causes which happen
before Guest OS receives the interrupt. But is the assumption right for
all OS?

In the case of level-triggerd interrupt, I/O device asserts interrupt
line, when the cause of interrupt happens. OS handles the cause,
I/O device de-asserts interrupt, and OS sends EOI to APICs.

When I/O APIC receives EOI, I/O APIC re-transmits interrupt to Local APIC 
if some interrupt line is asserted.

Some OS might rely on this re-transmittion by I/O APIC. 


This is the part of "handle_IRQ_event" in linux 2.6.18:

        do {
                ret = action->handler(irq, action->dev_id, regs);
                if (ret == IRQ_HANDLED)
                        status |= action->flags;
                retval |= ret;
                action = action->next;
        } while (action);

The assumption is right for linux.

But other OS might have the code like the following:

        do {
                ret = action->handler(irq, action->dev_id, regs);
                if (ret == IRQ_HANDLED) {
                        status |= action->flags;
                        retval |= ret;
                        break;
                        ^^^^^^
                }
                action = action->next;
        } while (action);


This code will work on real machine, because I/O APIC re-transmits
interrupt, if the cause to be handled remains.  If some OS has the
code like the above, the assumption isn't right.

Actually, my concern is whether the assumption is right for Windows,
or not. Do you know about this, or does your patch works well with
Windows guest?

Thanks,
--
Shohei Fujiwara

> Generally, it's easy to "translate" an edged interrupt to a level one,
> but not the other way.
> 
> Thanks,
> Qing
> > 
> > What do you think?
> > 
> > Thanks,
> > --
> > Shohei Fujiwara
> > 
> 
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