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RE: [Xen-devel] Signalling DomU on TPR write

To: "Keir Fraser" <keir.fraser@xxxxxxxxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxx>
Subject: RE: [Xen-devel] Signalling DomU on TPR write
From: "James Harper" <james.harper@xxxxxxxxxxxxxxxx>
Date: Thu, 1 Jan 2009 20:35:04 +1100
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Thread-topic: [Xen-devel] Signalling DomU on TPR write
> On 01/01/2009 00:57, "James Harper" <james.harper@xxxxxxxxxxxxxxxx>
wrote:
> 
> > Obviously a number of iterations will be required before all the
> > patching is done, but I don't think that's a problem. Patching would
> > occur in the DomU with all processors at HIGH_LEVEL (interrupts
> > disabled).
> >
> > Does that sound acceptable?
> 
> I'd run with AMD's static patch tables and see how far that gets you.

I've exchanged a few emails with Travis and he seems to think they may
be incomplete, although I guess adding the missing entries wouldn't be a
big deal - just add some periodic logging to the hypervisor and catch
the writes.

> There's no reason to think Microsoft are going to release any further
> kernels without the lazy TPR optimisation.

Hadn't thought of it that way... Travis has indicated that his license
is compatible with GPLv2, so yes, I'll stick with that.

Thanks

James

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