On Tuesday 02 December 2008 10:44:53 James Harper wrote:
> > On 2/12/08 09:05, "Igor Chubin" <igor@xxxxxxx> wrote:
> > > Hello, All.
> > >
> > > Do I understand correctly:
> > >
> > > for the present it is possible to make domain live migration
> > > across two hosts, one of which is Intel-CPU-based and
> > > another is AMD-CPU-based?
> > >
> > > Does CPUID feature of Xen 3.3 permit live migration only
> > > between hosts with CPUs with different flags but
> > > produce by the same vendor?
> > >
> > > What is the difference (from domU perspective)
> > > between such CPUs, that prohibits live migration?
You need to emulate SYSENTER for the 64bit case
completely (including the MSRs MSR_IA32_SYSENTER_CS,
MSR_IA32_SYSENTER_EIP and MSR_IA32_SYSENTER_ESP)
for the 32bit compat and 64bit modes.
The three MSRs also exist on AMD, but unlike on Intel
they are always 32bit. So you have to emulate them
with a 64bit storage. The SYSENTER fields in the vmcb
are 64bit wide for alignment purpose, but only the
lower 32bits are used (meaning the guest still only see's
a 32bit wide MSRs, upper 4-bytes are zero-filled by hw).
So you can't use them as 64bit storage to emulate them.
Another issue are the x87 FPU instructions. Both AMD and Intel
CPUs compute with more than 64bits internally and the results
are different on the additional bits. If the FPU is heavily used,
(e.g. in a loop), differences appear and comparisons of results
will fail after migration which are intended to succeed. Attached
is a fpu testprogram which shows the FPU differences.
A third case is the idle-loop in the guests. Intel prefers monitor/mwait,
AMD prefers hlt. Moreover, monitor/mwait has been introduced in AMD Family10h,
so if you're migrating to an AMD K8, Xen has to emulate the monitor/mwait
instructions.
Hope, that clearifies things up.
Christoph
--
AMD Saxony, Dresden, Germany
Operating System Research Center
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fpu.c
Description: Text Data
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