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[Xen-devel] [PATCH] Add XSAVE/XRSTOR support to Xen
| To: | 'Keir Fraser' <keir.fraser@xxxxxxxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxx> |
|---|---|
| Subject: | [Xen-devel] [PATCH] Add XSAVE/XRSTOR support to Xen |
| From: | "Cui, Dexuan" <dexuan.cui@xxxxxxxxx> |
| Date: | Wed, 26 Nov 2008 17:43:35 +0800 |
| Accept-language: | zh-CN, en-US |
| Acceptlanguage: | zh-CN, en-US |
| Cc: | |
| Delivery-date: | Wed, 26 Nov 2008 01:44:12 -0800 |
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| Thread-index: | AclO9qyRbSjwD/1rTCWQHUuOMKlcDAAsP9KQ |
| Thread-topic: | [PATCH] Add XSAVE/XRSTOR support to Xen |
The attached patch adds the support of XSAVE/XRSTOR infrastructure for x86. XSAVE/XRSTOR manages the existing and future processor extended states on x86 architecture. XSAVE/XRSTOR related stuff is defined in Intel SDMs (The latest version is Nov. 2008): http://www.intel.com/products/processor/manuals/ The patch uses the classical CR0.TS based lazy algorithm. For now only FPU/SSE states (The bit 0 and 1 of XCR0) is supported. Signed-off-by: Dexuan Cui <dexuan.cui@xxxxxxxxx>
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