Re: [Xen-devel] irq_guest_eoi_timer interaction with MSI

["Jan Beulich" <jbeulich@xxxxxxxxxx>]

>>> Keir Fraser <keir.fraser@xxxxxxxxxxxxx> 13.11.08 17:22 >>>
>On 13/11/08 16:21, "Keir Fraser" <keir.fraser@xxxxxxxxxxxxx> wrote:
>
>>> But then there'd be a hypercall for each MSI instance, most of the time
>>> without any real need. With a high interrupt rate I'm afraid this does
>>> matter.
>> 
>> I don't understand what you mean. There is a one-to-one-one relationship
>> between MSIs, PIRQs, and event channels.

Up to now, MSI didn't require an EOI, and devices that support masking (in
particular all MSI-X ones) wouldn't generally require an EOI even with the
patch send earlier. What you propose would make them all require an EOI
all of the sudden, despite them needing hypervisor assistance only when
the interrupt got masked.

>Also I'll add we currently do a hypercall for every level-triggered IO-APIC
>IRQ, which was really all we supported until recently. Seemed to work well
>enough performance-wise in that case.

While that may be correct (I doubt anyone measured the throughput
difference - really, there was nothing to measure in the IO-APIC case as
there was no alternative to doing an EOI hypercall), I don't view this as a
valid argument. If we can do with less hypercalls, we should. And this
especially when using a feature (MSI) the particular goal of which is to
improve performance. Otherwise, the only reason for having MSI support
would be for devices that don't support INTA (which presumably aren't
that many).

Jan


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