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[Xen-devel] 32-bit HVM cpuid(80000001), long mode feature?

To: xen-devel@xxxxxxxxxxxxxxxxxxx
Subject: [Xen-devel] 32-bit HVM cpuid(80000001), long mode feature?
From: Juergen Keil <jk@xxxxxxxx>
Date: Mon, 2 Jun 2008 16:30:35 +0200 (CEST)
Delivery-date: Mon, 02 Jun 2008 07:31:00 -0700
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When the 32-bit version of the xen-3.3-unstable hypervisor is used 
on 64-bit x86 hardware, a hvm domU will currently detect the 
presence of the long mode feature when looking at the feature
flags returned by cpuid(80000001).

But when the hvm domain tries it enable long mode, the 32-bit 
hypervisor refuses this.

xen.hg/xen/arch/x86/hvm/hvm.c checks:

    if ( (value & ~(EFER_FFXSE | EFER_LME | EFER_NX | EFER_SCE)) ||
         ((sizeof(long) != 8) && (value & EFER_LME)) ||   <<<<<<<<<<<<<<<<<<<<
         (!cpu_has_nx && (value & EFER_NX)) ||
         (!cpu_has_syscall && (value & EFER_SCE)) ||
         (!cpu_has_ffxsr && (value & EFER_FFXSE)) )
    {
        gdprintk(XENLOG_WARNING, "Trying to set reserved bit in "
                 "EFER: %"PRIx64"\n", value);
        hvm_inject_exception(TRAP_gp_fault, 0, 0);
        return X86EMUL_EXCEPTION;
    }


This confuses {Open}Solaris' version of GRUB, when we try to start
an {Open}Solaris HVM domU on a 32-bit hypervisor,  on a 64-bit cpu.

The hvm domain crashes with an error message like this on the xen console
(apparently because the bootstrap code automatically tries to boot into
the 64-bit kernel):

    hvm.c:782:d12 Trying to set reserved bit in EFER: 900



Shouldn't the 32-bit hypervisor stop announcing the long mode feature
(X86_FEATURE_LM) for hvm domains, in the default configuration?


On 3.1.4 this wasn't a problem;  long mode wasn't announced and 
OpenSolaris did boot into the 32-bit kernel.



The attached patch strips the long mode X86_FEATURE_LM bit, unless
we're running on a 64-bit hypervisor.
diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c
--- a/tools/libxc/xc_cpuid_x86.c
+++ b/tools/libxc/xc_cpuid_x86.c
@@ -35,6 +35,7 @@
     int xc, domid_t domid, const unsigned int *input, unsigned int *regs)
 {
     unsigned long pae = 0;
+    xen_capabilities_info_t xen_caps = "";
 
     xc_get_hvm_param(xc, domid, HVM_PARAM_PAE_ENABLED, &pae);
 
@@ -56,6 +57,9 @@
         if ( !pae )
             clear_bit(X86_FEATURE_PAE & 31, regs[3]);
         clear_bit(X86_FEATURE_PSE36 & 31, regs[3]);
+       if (xc_version(xc, XENVER_capabilities, &xen_caps) == 0 &&
+           strstr(xen_caps, "x86_64") == NULL)
+               clear_bit(X86_FEATURE_LM & 31, regs[3]);
 
         /* Filter all other features according to a whitelist. */
         regs[2] &= (bitmaskof(X86_FEATURE_LAHF_LM) |
@@ -80,6 +84,8 @@
 static void intel_xc_cpuid_policy(
     int xc, domid_t domid, const unsigned int *input, unsigned int *regs)
 {
+    xen_capabilities_info_t xen_caps = "";
+
     switch ( input[0] )
     {
     case 0x00000001:
@@ -93,6 +99,10 @@
         break;
 
     case 0x80000001:
+       if (xc_version(xc, XENVER_capabilities, &xen_caps) == 0 &&
+           strstr(xen_caps, "x86_64") == NULL)
+               clear_bit(X86_FEATURE_LM & 31, regs[3]);
+
         /* Only a few features are advertised in Intel's 0x80000001. */
         regs[2] &= (bitmaskof(X86_FEATURE_LAHF_LM));
         regs[3] &= (bitmaskof(X86_FEATURE_NX) |
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