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xen-devel
[Xen-devel] Re: what's the purpose of linear page table (PML4 entry 258)
I find that it give the same pte value as I manually walking the 4 level page table directory. So I guest it facilitates the locating of a pte from va. It removes the 4-level looking up process: pgd->pud->pmd->pt->pte
It saves time. Am I right?
But I still don't know how it works.
On Mon, Mar 31, 2008 at 2:41 AM, weiming < zephyr.zhao@xxxxxxxxx> wrote:
Hi,
When I read the code of do_update_va_mapping, I find that it update the pte entry in the line page table by looking up the line page table via guest_map_l1e() :
2998 int do_update_va_mapping(unsigned long va, u64 val64,
2999 unsigned long flags)
3000 {
3001 l1_pgentry_t val = l1e_from_intpte(val64);
3002 struct vcpu *v = current;
3003 struct domain *d = v->domain;
3004 l1_pgentry_t *pl1e;
3005 unsigned long vmask, bmap_ptr, gl1mfn;
3006 cpumask_t pmask;
3007 int rc = 0;
3008 3009 perfc_incr(calls_to_update_va);
3010 3011 if ( unlikely(!__addr_ok(va) && !paging_mode_external(d)) )
3012 return -EINVAL;
3013
3014 rc = xsm_update_va_mapping(current->domain, val);
3015 if ( rc )
3016 return rc;
3017 3018 LOCK_BIGLOCK(d);
3019 3020 pl1e = guest_map_l1e(v, va, &gl1mfn);
... ...
what's the purpose of this table?
Thanks
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