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Re: [Xen-devel] page table question!

To: tgh <wwwwww4187@xxxxxxxxxxx>
Subject: Re: [Xen-devel] page table question!
From: Daniel Stodden <stodden@xxxxxxxxxx>
Date: Sat, 08 Dec 2007 15:50:21 +0100
Cc: xen-devel@xxxxxxxxxxxxxxxxxxx, Tim Deegan <Tim.Deegan@xxxxxxxxxx>, Tim Deegan <Tim.Deegan@xxxxxxxxxxxxx>, MT Rezaie <mmrezaie@xxxxxxxxx>, "Petersson, Mats" <Mats.Petersson@xxxxxxx>, Mark Williamson <mark.williamson@xxxxxxxxxxxx>
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On Sat, 2007-12-08 at 22:26 +0800, tgh wrote:
> hi
> In the HVM mode on the AMD NPT or intel EPT,VMM should maintain a 
> counterpart pagetable for each of the guestOS process's page table, is 
> it ? 

No. 

It's similar to shadow paging in that two different sets of page tables
are in use. But then, returning to some of your original questions above
in this thread: *This* is where hardware consults a P2M table: The
nested page table does not, like a shadow table, translate virtual to
machine, but pseudo-physical to machine addresses.

> then there will not be a small mount of memory consumption for 
> hyperviser's limited VA ,is it? or where are those counterpart page 
> tables stored ?

Or do you mean the part of the VM dedicated to the hypervisor? Code
running in root mode is running in "host linear" address space, i.e. the
nested page table, not the guest's one. Actually, that's one major
benefit of nested paging: counteraction "address space compression".

So, the guest system takes two levels of translation, while the host
(Xen, in this case) takes only one.

Hope this helps. Clarify your question if it doesn't.

regards,
daniel

-- 
Daniel Stodden
LRR     -      Lehrstuhl für Rechnertechnik und Rechnerorganisation
Institut für Informatik der TU München             D-85748 Garching
http://www.lrr.in.tum.de/~stodden         mailto:stodden@xxxxxxxxxx
PGP Fingerprint: F5A4 1575 4C56 E26A 0B33  3D80 457E 82AE B0D8 735B



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