>This is what I really don't like about decoder adjustments:
>Even when changes for a certain instruction type are found necessary,
no care is
>taken that similar instructions are also updated/added. In this case,
for
>instance, you add the register destination/source case for opcode
0x89/0x8B, but the
>same adjustments aren't made for opcode 0x88/0x8A. This is calling for
future
>problems, as much as e.g. the absence of emulation of opcode 0xC7
despite
>present emulation of 0xC6. I'm not going to continue, but I suppose you
get my point.
A complete, maybe perfect, decoder, that's also my ultimate goal :-).
>
>Also, how come that the mode/address size conditions are different for
>0x88/0x8A versus 0x89/0x8B (they were identical so far for 0x88, 0x8A,
and
>0x8B, with some extra code for 0x89)?
I don't expect 0x89/0x8B (movb) will be used in switching from protected
mode to real mode.
Intel SDM says, once software changes CR0.PE, it should *immediately*
use a long jump instruction to finish the mode switching between
real-address mode and protected mode. But this is not strictly obeyed,
and this is why I added the mov decoder here.
I will prefer to keep the VMXAssist decoder relatively small.
-Xin
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