On Mon, 2007-06-04 at 12:55 +0300, Avi Kivity wrote:
> Rusty Russell wrote:
> > On Sun, 2007-06-03 at 14:39 +0300, Avi Kivity wrote:
> >
> >> Rusty Russell wrote:
> >>
> >>> Hmm... Perhaps I should move the used arrays into the "struct
> >>> virtio_device" and guarantee that the id (returned by add_*buf) is an
> >>> index into that. Then we can trivially add a corresponding bit array.
> >>>
> >> That may force the virtio backend to do things it doesn't want to.
> >>
> >
> > Well, I have two implementations, and both ids already fit this model so
> > I have some confidence. I just need to add the set_bit/clear_bit to the
> > read/write one, and use sync_clear_bit to the descriptor-based one
> > (which I suspect will actually get a little cleaner).
> >
> > So I think this constraint is a reasonable thing to add anyway.
>
> Some hardware (tulip IIRC, but long time ago) allows linked list based
> descriptors. If a virtio implementation takes a similar approach, it
> may not have an array of descriptors.
Sure, but the mapping becomes non-trivial only if you have no ceiling on
the number in flight at any time. OTOH, it's a very nice property for
driver authors. I'll send the diffs once debugging is done...
> Networking hardware generally services descriptors in a FIFO manner.
Well, ethernet guarantees order. Not sure about others tho...
> virtio may not (for example, it may offload copies of larger packets to
> a dma engine such as I/OAT, resulting in a delay, but copy smaller
> packets immediately). that means that there will be some mismatch
> between virtio drivers and real hardware drivers.
I think your point is that the completion bitmap (or indeed, the current
approach) does not maintain order? Hmm, this is more convincing to me
than cache arguments, since some devices might want ordering and want
more than a single io in flight.
I shall ponder this more deeply...
Thanks!
Rusty.
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