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[Xen-devel] Question regarding the number of P2M l3e entries
| To: | xen-devel@xxxxxxxxxxxxxxxxxxx |
|---|---|
| Subject: | [Xen-devel] Question regarding the number of P2M l3e entries |
| From: | "Huang2, Wei" <Wei.Huang2@xxxxxxx> |
| Date: | Tue, 3 Apr 2007 01:25:03 -0500 |
| Delivery-date: | Mon, 02 Apr 2007 23:24:16 -0700 |
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| Thread-index: | Acd1uNeEikWwl1aISe2V4WQ5S2lkqw== |
| Thread-topic: | Question regarding the number of P2M l3e entries |
|
In p2m.c (line 197
and line 550), the code assumes the number of L3 P2M table entries is 8 (under
PAE mode). According to Intel and AMD specs, it is 4. Could someone explain
this discrepancy? Is it a bug?
-Wei
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