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RE: [Xen-devel] [PATCH] Enable VMX MSR bitmap support

To: "Li, Xin B" <xin.b.li@xxxxxxxxx>, "Keir Fraser" <keir@xxxxxxxxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxx>
Subject: RE: [Xen-devel] [PATCH] Enable VMX MSR bitmap support
From: "Li, Xin B" <xin.b.li@xxxxxxxxx>
Date: Fri, 30 Mar 2007 13:38:24 +0800
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Thread-topic: [Xen-devel] [PATCH] Enable VMX MSR bitmap support
So this patch is needed to fix the issue according to the latest PRM.
-Xin

diff -r a5a2c49eda68 xen/arch/x86/hvm/vmx/vmcs.c
--- a/xen/arch/x86/hvm/vmx/vmcs.c       Tue Mar 13 18:13:11 2007 -0600
+++ b/xen/arch/x86/hvm/vmx/vmcs.c       Fri Mar 30 10:30:16 2007 +0800
@@ -70,12 +70,12 @@ static void disable_intercept_for_msr(u3
     if ( msr <= 0x1fff )
     {
         __clear_bit(msr, hvm_msr_bitmap + 0x000); /* read-low */
-        __clear_bit(msr, hvm_msr_bitmap + 0x400); /* write-low */
+        __clear_bit(msr, hvm_msr_bitmap + 0x800); /* write-low */
     }
     else if ( (msr >= 0xc0000000) && (msr <= 0xc0001fff) )
     {
         msr &= 0x1fff;
-        __clear_bit(msr, hvm_msr_bitmap + 0x800); /* read-high */
+        __clear_bit(msr, hvm_msr_bitmap + 0x400); /* read-high */
         __clear_bit(msr, hvm_msr_bitmap + 0xc00); /* write-high */
     }
 }

>-----Original Message-----
>From: xen-devel-bounces@xxxxxxxxxxxxxxxxxxx 
>[mailto:xen-devel-bounces@xxxxxxxxxxxxxxxxxxx] On Behalf Of Li, Xin B
>Sent: Friday, March 30, 2007 10:18 AM
>To: Keir Fraser; xen-devel@xxxxxxxxxxxxxxxxxxx
>Subject: RE: [Xen-devel] [PATCH] Enable VMX MSR bitmap support
>
>> Also you got the write-low and read-high offsets into the MSR bitmap
>the wrong way round!
>>
>
>Oops, seems you're using an old version of Intel PRM, if you check the
>latest one, you can find the sequence changed, which also 
>confused me at
>the beginning!!!
>-Xin
>
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