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RE: [Xen-devel] how can native driver response quickly for low FIFO devi

To: "Keir Fraser" <Keir.Fraser@xxxxxxxxxxxx>
Subject: RE: [Xen-devel] how can native driver response quickly for low FIFO device
From: "Dong, Eddie" <eddie.dong@xxxxxxxxx>
Date: Thu, 25 May 2006 21:08:56 +0800
Cc: xen-devel@xxxxxxxxxxxxxxxxxxx
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Thread-topic: [Xen-devel] how can native driver response quickly for low FIFO device
O, sorry for the confuse message. Here I mean the issue in native device
(e.x. dom0 UART), not HVM virtual UART.
When hardware UART device receives a byte, it will send pirq to dom0,
although dom0 is not blocking but it may not get scheduled in at
instance. Say it needs to wait for another domain (domU or domVMX) to
run out of time slice, say 10ms in default scheduler. Within this 10ms,
the hardware UART may receive another tens of bytes before dom0 UART
device driver can really read the data and copy to driver buffer. So in
this case the hardware UART device will become "receiving data
overwritten",  which means receiving data lose for us :-( 
Is there anybody ever tried to use ttyS0 succesfully when multiple
domain is running on same LP?

Keir Fraser wrote:
> On 25 May 2006, at 10:11, Dong, Eddie wrote:
>>      For those devices like UART which has very few FIFOs and no DMA
>> support, how can scheduler (sedf?) help us to improve the response of
>> native device driver in driver domain? Otherwise the receive data
>> may be overwritten in driver domain and then makes the device
>> unusable. 
> You can have a receive FIFO as big as you like: it doesn't need to be
> visible to the HVM guest. If the guest has configured the UART with an
> 'N-byte FIFO' then allocate the FIFO as big as you like and drive the
> UART device model logic such that if you have more than N bytes
> currently in the FIFO it looks to the guest (and the core of the
> device model) as if there are exactly N bytes currently in the FIFO.
>   -- Keir

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