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Re: [Xen-devel] how can native driver response quickly for low FIFO devi

On 25 May 2006, at 11:30, Keir Fraser wrote:

        For those devices like UART which has very few FIFOs and no DMA
support, how can scheduler (sedf?) help us to improve the response of
native device driver in driver domain? Otherwise the receive data may be
overwritten in driver domain and then makes the device unusable.

You can have a receive FIFO as big as you like: it doesn't need to be visible to the HVM guest. If the guest has configured the UART with an 'N-byte FIFO' then allocate the FIFO as big as you like and drive the UART device model logic such that if you have more than N bytes currently in the FIFO it looks to the guest (and the core of the device model) as if there are exactly N bytes currently in the FIFO.

The alternative is to implicitly have the extra buffering in the OS. This may allow also back pressure to be applied to the sender (UNIX pipe is full; TCP receive window is closed; etc.). This only works if the device model is 'pulling' data into its receive FIFO (e.g., read() system call) rather than having data 'pushed' to it.

 -- Keir

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