RE: [Xen-devel] [PATCH][VT]vga acceleration for cirrus logic device model

["Jiang, Yunhong" <yunhong.jiang@xxxxxxxxx>]

Keir Fraser wrote:
> On 23 Sep 2005, at 14:46, Jiang, Yunhong wrote:
> 
>> I think 1:1 page table is used for both paging disabled running AND
>> physical-to-machine table, so agree that if we ignore the
>> physical-to-machine table, it is ok with current 1:1 page table
>> implementaion, but just as you said, we need work out later for
>> phys-to-machine mapping.
> 
> Currently that works by mapping the 1:1 top-level page directory as a
> second-level page directory in the monitor pagetables. Obviously that
> doesn't work if the monitor is using 64-bit pagetables and the 1:1
> tables are in 32-bit pae mode. :-) This cannot be solved by using
> 64-bit 1:1 pagetables though (e.g., in that mode we cannot use vm86
> mode).
> 
> I think the correct approach will be to create extra page directories
> in the monitor pagetables to map all the 1:1 l1's, plus extra l1's
> that map pseudophys memory above 4GB.
> 
> In summary, you were correct in the first place. :-)
> 
>   -- Keir

Thanks for your suggestion very much !
I will work out a fix for it.

Yunhong Jiang

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