RE: [Xen-devel] PSE in guests

["Nakajima, Jun" <jun.nakajima@xxxxxxxxx>]

One issue that Ian would tell is that the linear page table technique
frequently used by Xen would (when accessing PTE) be broken because the
PS Bit (Bit 7) in a page-directory entry becomes PAT Bit (Bit 7) in the
page-table entry. 

We are considering supporting 2MB and 4MB pages in shadow mode
(especially for VMX domains).

Jun
-----Original Message-----
From: xen-devel-admin@xxxxxxxxxxxxxxxxxxxxx
[mailto:xen-devel-admin@xxxxxxxxxxxxxxxxxxxxx] On Behalf Of Ky
Srinivasan
Sent: Tuesday, February 22, 2005 5:12 PM
To: xen-devel@xxxxxxxxxxxxxxxxxxxxx
Subject: [Xen-devel] PSE in guests

Looking at   the 2.0 code, it looks like the guest OSs are made to
believe that PSE is not available. Is this a design choice? Has any work
been done on supporting 4M pages in guest kernels?

Regards,

K. Y 


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