# HG changeset patch
# User Jan Beulich <jbeulich@xxxxxxxx>
# Date 1321029979 -3600
# Node ID 9af6829a927379b6455a64ca49e769de34120800
# Parent 44d925615ac6dc5667cfae5e287dbbd720d89fc7
ia64: introduce atomic_{read,write}NN()
These are required to be able to build certain portions of common code.
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
Acked-by: Keir Fraser <keir@xxxxxxx>
---
diff -r 44d925615ac6 -r 9af6829a9273 xen/include/asm-ia64/linux-xen/asm/atomic.h
--- a/xen/include/asm-ia64/linux-xen/asm/atomic.h Fri Nov 11 14:35:51
2011 +0100
+++ b/xen/include/asm-ia64/linux-xen/asm/atomic.h Fri Nov 11 17:46:19
2011 +0100
@@ -24,12 +24,9 @@
typedef struct { volatile __s64 counter; } atomic64_t;
#ifndef XEN
+
#define ATOMIC_INIT(i) ((atomic_t) { (i) })
#define ATOMIC64_INIT(i) ((atomic64_t) { (i) })
-#else
-#define ATOMIC_INIT(i) { (i) }
-#define ATOMIC64_INIT(i) { (i) }
-#endif
#define atomic_read(v) ((v)->counter)
#define atomic64_read(v) ((v)->counter)
@@ -37,6 +34,55 @@
#define atomic_set(v,i) (((v)->counter) = (i))
#define atomic64_set(v,i) (((v)->counter) = (i))
+#else
+
+#define ATOMIC_INIT(i) { (i) }
+#define ATOMIC64_INIT(i) { (i) }
+
+#define build_atomic_read(tag, type) \
+static inline type atomic_read##tag(const volatile type *addr) \
+{ \
+ type ret; \
+ asm volatile("ld%2.acq %0 = %1" \
+ : "=r" (ret) \
+ : "m" (*addr), "i" (sizeof(type))); \
+ return ret; \
+}
+
+#define build_atomic_write(tag, type) \
+static inline void atomic_write##tag(volatile type *addr, type val) \
+{ \
+ asm volatile("st%2.rel %0 = %1" \
+ : "=m" (*addr) \
+ : "r" (val), "i" (sizeof(type))); \
+}
+
+build_atomic_read(8, uint8_t)
+build_atomic_read(16, uint16_t)
+build_atomic_read(32, uint32_t)
+build_atomic_read(64, uint64_t)
+build_atomic_read(_int, int)
+build_atomic_read(_long, long)
+
+build_atomic_write(8, uint8_t)
+build_atomic_write(16, uint16_t)
+build_atomic_write(32, uint32_t)
+build_atomic_write(64, uint64_t)
+build_atomic_write(_int, int)
+build_atomic_write(_long, long)
+
+#define _atomic_read(v) ((v).counter)
+#define _atomic64_read(v) ((v).counter)
+#define atomic_read(v) atomic_read_int(&((v)->counter))
+#define atomic64_read(v) atomic_read_long(&((v)->counter))
+
+#define _atomic_set(v,i) (((v).counter) = (i))
+#define _atomic64_set(v,i) (((v).counter) = (i))
+#define atomic_set(v,i) atomic_write_int(&((v)->counter), i)
+#define atomic64_set(v,l) atomic_write_long(&((v)->counter), l)
+
+#endif
+
static __inline__ int
ia64_atomic_add (int i, atomic_t *v)
{
@@ -59,7 +105,7 @@
do {
CMPXCHG_BUGCHECK(v);
- old = atomic_read(v);
+ old = atomic64_read(v);
new = old + i;
} while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic64_t)) != old);
return new;
@@ -87,7 +133,7 @@
do {
CMPXCHG_BUGCHECK(v);
- old = atomic_read(v);
+ old = atomic64_read(v);
new = old - i;
} while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic64_t)) != old);
return new;
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