# HG changeset patch
# User Wei Wang <wei.wang2@xxxxxxx>
# Date 1321009561 -3600
# Node ID 4699decb8424a00447c466205be3cb4d0fb95a76
# Parent d23685e36486bbd974bb97b95629e4efe93a0c5b
amd iommu: Introduce iommu_has_cap() function
Signed-off-by: Wei Wang <wei.wang2@xxxxxxx>
Committed-by: Jan Beulich <jbeulich@xxxxxxxx>
---
diff -r d23685e36486 -r 4699decb8424 xen/drivers/passthrough/amd/iommu_init.c
--- a/xen/drivers/passthrough/amd/iommu_init.c Fri Nov 11 12:05:14 2011 +0100
+++ b/xen/drivers/passthrough/amd/iommu_init.c Fri Nov 11 12:06:01 2011 +0100
@@ -79,9 +79,10 @@
entry = readl(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET);
/* Setup HT flags */
- iommu_has_ht_flag(iommu, AMD_IOMMU_ACPI_HT_TUN_ENB_SHIFT) ?
- iommu_set_bit(&entry, IOMMU_CONTROL_HT_TUNNEL_TRANSLATION_SHIFT):
- iommu_clear_bit(&entry, IOMMU_CONTROL_HT_TUNNEL_TRANSLATION_SHIFT);
+ if ( iommu_has_cap(iommu, PCI_CAP_HT_TUNNEL_SHIFT) )
+ iommu_has_ht_flag(iommu, AMD_IOMMU_ACPI_HT_TUN_ENB_SHIFT) ?
+ iommu_set_bit(&entry, IOMMU_CONTROL_HT_TUNNEL_TRANSLATION_SHIFT) :
+ iommu_clear_bit(&entry, IOMMU_CONTROL_HT_TUNNEL_TRANSLATION_SHIFT);
iommu_has_ht_flag(iommu, AMD_IOMMU_ACPI_RES_PASS_PW_SHIFT) ?
iommu_set_bit(&entry, IOMMU_CONTROL_RESP_PASS_POSTED_WRITE_SHIFT):
diff -r d23685e36486 -r 4699decb8424 xen/drivers/passthrough/amd/iommu_map.c
--- a/xen/drivers/passthrough/amd/iommu_map.c Fri Nov 11 12:05:14 2011 +0100
+++ b/xen/drivers/passthrough/amd/iommu_map.c Fri Nov 11 12:06:01 2011 +0100
@@ -996,7 +996,7 @@
return;
}
- if ( !iommu->iotlb_support )
+ if ( !iommu_has_cap(iommu, PCI_CAP_IOTLB_SHIFT) )
return;
req_id = get_dma_requestor_id(iommu->seg, bdf);
diff -r d23685e36486 -r 4699decb8424 xen/drivers/passthrough/amd/pci_amd_iommu.c
--- a/xen/drivers/passthrough/amd/pci_amd_iommu.c Fri Nov 11 12:05:14
2011 +0100
+++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c Fri Nov 11 12:06:01
2011 +0100
@@ -115,7 +115,7 @@
hd->paging_mode, valid);
if ( pci_ats_device(iommu->seg, bus, devfn) &&
- iommu->iotlb_support )
+ iommu_has_cap(iommu, PCI_CAP_IOTLB_SHIFT) )
iommu_dte_set_iotlb((u32 *)dte, dte_i);
invalidate_dev_table_entry(iommu, req_id);
@@ -307,7 +307,7 @@
disable_translation((u32 *)dte);
if ( pci_ats_device(iommu->seg, bus, devfn) &&
- iommu->iotlb_support )
+ iommu_has_cap(iommu, PCI_CAP_IOTLB_SHIFT) )
iommu_dte_set_iotlb((u32 *)dte, 0);
invalidate_dev_table_entry(iommu, req_id);
diff -r d23685e36486 -r 4699decb8424 xen/include/asm-x86/amd-iommu.h
--- a/xen/include/asm-x86/amd-iommu.h Fri Nov 11 12:05:14 2011 +0100
+++ b/xen/include/asm-x86/amd-iommu.h Fri Nov 11 12:06:01 2011 +0100
@@ -53,10 +53,6 @@
u16 cap_offset;
iommu_cap_t cap;
- u8 pte_not_present_cached;
- u8 ht_tunnel_support;
- u8 iotlb_support;
-
u8 ht_flags;
void *mmio_base;
diff -r d23685e36486 -r 4699decb8424
xen/include/asm-x86/hvm/svm/amd-iommu-proto.h
--- a/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h Fri Nov 11 12:05:14
2011 +0100
+++ b/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h Fri Nov 11 12:06:01
2011 +0100
@@ -181,4 +181,10 @@
return get_field_from_reg_u32(reg, 1U << bit, bit);
}
+static inline int iommu_has_cap(struct amd_iommu *iommu, uint32_t bit)
+{
+ u32 mask = 1U << bit;
+ return iommu->cap.header & mask;
+}
+
#endif /* _ASM_X86_64_AMD_IOMMU_PROTO_H */
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