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[Xen-changelog] [xen-unstable] libxl: allow to enable/disable cpuid bits

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Subject: [Xen-changelog] [xen-unstable] libxl: allow to enable/disable cpuid bits
From: Xen patchbot-unstable <patchbot@xxxxxxx>
Date: Wed, 02 Nov 2011 22:00:17 +0000
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# HG changeset patch
# User Christoph Egger <Christoph.Egger@xxxxxxx>
# Date 1320251003 0
# Node ID a6aa8ddce35a48315d0a43b7bedb1f95394c9dc9
# Parent  205b89ad2d660dab2768f74c6c1a9ea64de228eb
libxl: allow to enable/disable cpuid bits

Allow to enable/disable SVM specific cpuid bits in the guest config
file via cpuid config option.  Also allow to enable/disable the
hypervisor cpuid bit in the guest config file. We need to disable the
hypervisor cpuid bit to get Hyper-V going.

Signed-off-by: Christoph Egger <Christoph.Egger@xxxxxxx>
Acked-by: Tim Deegan <tim@xxxxxxx>
Committed-by: Ian Jackson <ian.jackson@xxxxxxxxxxxxx>
---


diff -r 205b89ad2d66 -r a6aa8ddce35a tools/libxl/libxl_cpuid.c
--- a/tools/libxl/libxl_cpuid.c Wed Nov 02 16:21:37 2011 +0000
+++ b/tools/libxl/libxl_cpuid.c Wed Nov 02 16:23:23 2011 +0000
@@ -92,6 +92,7 @@
         {"proccount",    0x00000001, NA, CPUID_REG_EBX, 16,  8},
         {"clflush",      0x00000001, NA, CPUID_REG_EBX,  8,  8},
         {"brandid",      0x00000001, NA, CPUID_REG_EBX,  0,  8},
+        {"hypervisor",   0x00000001, NA, CPUID_REG_ECX, 31,  1},
         {"f16c",         0x00000001, NA, CPUID_REG_ECX, 29,  1},
         {"avx",          0x00000001, NA, CPUID_REG_ECX, 28,  1},
         {"osxsave",      0x00000001, NA, CPUID_REG_ECX, 27,  1},
@@ -178,6 +179,13 @@
         {"procpkg",      0x00000004,  0, CPUID_REG_EAX, 26,  6},
         {"apicidsize",   0x80000008, NA, CPUID_REG_ECX, 12,  4},
         {"nc",           0x80000008, NA, CPUID_REG_ECX,  0,  8},
+        {"svm_npt",      0x8000000a, NA, CPUID_REG_EDX,  0,  1},
+        {"svm_lbrv",     0x8000000a, NA, CPUID_REG_EDX,  1,  1},
+        {"svm_nrips",    0x8000000a, NA, CPUID_REG_EDX,  3,  1},
+        {"svm_tscrate",  0x8000000a, NA, CPUID_REG_EDX,  4,  1},
+        {"svm_vmcbclean",0x8000000a, NA, CPUID_REG_EDX,  5,  1},
+        {"svm_decode",   0x8000000a, NA, CPUID_REG_EDX,  7,  1},
+        {"svm_pausefilt",0x8000000a, NA, CPUID_REG_EDX, 10,  1},
 
         {NULL, 0, CPUID_REG_INV, 0, 0}
     };

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