# HG changeset patch
# User Jan Beulich <jbeulich@xxxxxxxxxx>
# Date 1299688288 0
# Node ID c56a2113d12854212a2e0ffd88da2ac8b0a3637c
# Parent be7e54d86c578101af8bec715ab4ec1ec0fda6e9
x86: MCE cleanup
Move some MCE data items into .data.read_mostly. Adjust some types,
and make some symbols static.
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxxxx>
---
diff -r be7e54d86c57 -r c56a2113d128 xen/arch/x86/cpu/mcheck/mce_intel.c
--- a/xen/arch/x86/cpu/mcheck/mce_intel.c Wed Mar 09 16:31:00 2011 +0000
+++ b/xen/arch/x86/cpu/mcheck/mce_intel.c Wed Mar 09 16:31:28 2011 +0000
@@ -25,7 +25,7 @@
static bool_t __read_mostly mce_force_broadcast;
boolean_param("mce_fb", mce_force_broadcast);
-static int nr_intel_ext_msrs = 0;
+static int __read_mostly nr_intel_ext_msrs;
/* Thermal Hanlding */
#ifdef CONFIG_X86_MCE_THERMAL
@@ -60,7 +60,7 @@
}
/* Thermal interrupt handler for this CPU setup */
-static void (*vendor_thermal_interrupt)(struct cpu_user_regs *regs)
+static void (*__read_mostly vendor_thermal_interrupt)(struct cpu_user_regs
*regs)
= unexpected_thermal_interrupt;
fastcall void smp_thermal_interrupt(struct cpu_user_regs *regs)
@@ -156,8 +156,10 @@
static void mce_barrier_enter(struct mce_softirq_barrier *);
static void mce_barrier_exit(struct mce_softirq_barrier *);
-struct mca_error_handler *mce_dhandlers, *mce_uhandlers;
-int mce_dhandler_num, mce_uhandler_num;
+static const struct mca_error_handler *__read_mostly mce_dhandlers;
+static const struct mca_error_handler *__read_mostly mce_uhandlers;
+static unsigned int __read_mostly mce_dhandler_num;
+static unsigned int __read_mostly mce_uhandler_num;
enum mce_result
{
@@ -174,12 +176,11 @@
{
struct mc_info *local_mi;
enum mce_result ret = MCER_NOERROR;
- uint32_t i;
struct mcinfo_common *mic = NULL;
struct mca_handle_result mca_res;
struct mca_binfo binfo;
- struct mca_error_handler *handlers = mce_dhandlers;
- int handler_num = mce_dhandler_num;
+ const struct mca_error_handler *handlers = mce_dhandlers;
+ unsigned int i, handler_num = mce_dhandler_num;
/* When in mce context, regs is valid */
if (regs)
@@ -724,8 +725,10 @@
result->result = MCA_NO_ACTION;
}
-struct mca_error_handler intel_mce_dhandlers[] =
- {{is_async_memerr, intel_memerr_dhandler}, {default_check,
intel_default_dhandler}};
+static const struct mca_error_handler intel_mce_dhandlers[] = {
+ {is_async_memerr, intel_memerr_dhandler},
+ {default_check, intel_default_dhandler}
+};
static void intel_default_uhandler(int bnum,
struct mca_binfo *binfo,
@@ -749,8 +752,9 @@
}
}
-struct mca_error_handler intel_mce_uhandlers[] =
- {{default_check, intel_default_uhandler}};
+static const struct mca_error_handler intel_mce_uhandlers[] = {
+ {default_check, intel_default_uhandler}
+};
static void intel_machine_check(struct cpu_user_regs * regs, long error_code)
{
@@ -1222,9 +1226,9 @@
mce_need_clearbank_register(intel_need_clearbank_scan);
mce_dhandlers = intel_mce_dhandlers;
- mce_dhandler_num = sizeof(intel_mce_dhandlers)/sizeof(struct
mca_error_handler);
+ mce_dhandler_num = ARRAY_SIZE(intel_mce_dhandlers);
mce_uhandlers = intel_mce_uhandlers;
- mce_uhandler_num = sizeof(intel_mce_uhandlers)/sizeof(struct
mca_error_handler);
+ mce_uhandler_num = ARRAY_SIZE(intel_mce_uhandlers);
}
static void cpu_mcabank_free(unsigned int cpu)
diff -r be7e54d86c57 -r c56a2113d128 xen/arch/x86/cpu/mcheck/vmce.c
--- a/xen/arch/x86/cpu/mcheck/vmce.c Wed Mar 09 16:31:00 2011 +0000
+++ b/xen/arch/x86/cpu/mcheck/vmce.c Wed Mar 09 16:31:28 2011 +0000
@@ -20,11 +20,11 @@
#define dom_vmce(x) ((x)->arch.vmca_msrs)
-uint64_t g_mcg_cap;
+static uint64_t __read_mostly g_mcg_cap;
/* Real value in physical CTL MSR */
-uint64_t h_mcg_ctl = 0UL;
-uint64_t *h_mci_ctrl;
+static uint64_t __read_mostly h_mcg_ctl;
+static uint64_t *__read_mostly h_mci_ctrl;
int vmce_init_msr(struct domain *d)
{
@@ -425,6 +425,7 @@
return 0;
}
+#if 0 /* currently unused */
int vmce_domain_inject(
struct mcinfo_bank *bank, struct domain *d, struct mcinfo_global *global)
{
@@ -436,6 +437,7 @@
return inject_vmce(d);
}
+#endif
int vmce_init(struct cpuinfo_x86 *c)
{
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