[Xen-changelog] [xen-unstable] x86: MSI: Mask/unmask msi irq during the window which programs msi.

[Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1256111423 -3600
# Node ID 76d4f12e07905fbcaf031e7e9d65be120d303c7f
# Parent  d7d7f978d704d75a819ce29f131ad4de7f1688a9
x86: MSI: Mask/unmask msi irq during the window which programs msi.

When program msi, it has to mask it first, otherwise, it
may generate inconsistent interrupts. According to spec,
if not masked, the interrupt generation behaviour is undefined.

Signed-off-by: Xiantao Zhang <xiantao.zhang@xxxxxxxxx>
---
 xen/arch/x86/msi.c |    4 ++++
 1 files changed, 4 insertions(+)

diff -r d7d7f978d704 -r 76d4f12e0790 xen/arch/x86/msi.c
--- a/xen/arch/x86/msi.c        Tue Oct 20 14:36:01 2009 +0100
+++ b/xen/arch/x86/msi.c        Wed Oct 21 08:50:23 2009 +0100
@@ -231,6 +231,7 @@ static void write_msi_msg(struct msi_des
         u8 slot = PCI_SLOT(dev->devfn);
         u8 func = PCI_FUNC(dev->devfn);
 
+        mask_msi_irq(entry->irq);
         pci_conf_write32(bus, slot, func, msi_lower_address_reg(pos),
                          msg->address_lo);
         if ( entry->msi_attrib.is_64 )
@@ -243,6 +244,7 @@ static void write_msi_msg(struct msi_des
         else
             pci_conf_write16(bus, slot, func, msi_data_reg(pos, 0),
                              msg->data);
+        unmask_msi_irq(entry->irq);
         break;
     }
     case PCI_CAP_ID_MSIX:
@@ -250,11 +252,13 @@ static void write_msi_msg(struct msi_des
         void __iomem *base;
         base = entry->mask_base;
 
+        mask_msi_irq(entry->irq);
         writel(msg->address_lo,
                base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
         writel(msg->address_hi,
                base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
         writel(msg->data, base + PCI_MSIX_ENTRY_DATA_OFFSET);
+        unmask_msi_irq(entry->irq);
         break;
     }
     default:

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