# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1238494206 -3600
# Node ID 1f8e6aca086813c3a81354a4c366b1c2434298d2
# Parent d5ddc782bc499a3605417eeef519b33616402768
intel mce: Small fixes.
Signed-off-by: Frank van der Linden <Frank.Vanderlinden@xxxxxxx>
---
xen/arch/x86/cpu/mcheck/mce_intel.c | 13 +++++++++----
1 files changed, 9 insertions(+), 4 deletions(-)
diff -r d5ddc782bc49 -r 1f8e6aca0868 xen/arch/x86/cpu/mcheck/mce_intel.c
--- a/xen/arch/x86/cpu/mcheck/mce_intel.c Mon Mar 30 16:48:26 2009 +0100
+++ b/xen/arch/x86/cpu/mcheck/mce_intel.c Tue Mar 31 11:10:06 2009 +0100
@@ -426,7 +426,7 @@ static void severity_scan(void)
* recovered, we need to RESET for avoiding DOM0 LOG missing
*/
for ( i = 0; i < nr_mce_banks; i++) {
- rdmsrl(MSR_IA32_MC0_STATUS + 4 * i , status);
+ mca_rdmsrl(MSR_IA32_MC0_STATUS + 4 * i , status);
if ( !(status & MCi_STATUS_VAL) )
continue;
/* MCE handler only handles UC error */
@@ -434,7 +434,12 @@ static void severity_scan(void)
continue;
if ( !(status & MCi_STATUS_EN) )
continue;
- if (status & MCi_STATUS_PCC)
+ /*
+ * If this was an injected error, keep going, since the
+ * interposed value will be lost at reboot.
+ */
+ if (status & MCi_STATUS_PCC && intpose_lookup(smp_processor_id(),
+ MSR_IA32_MC0_STATUS + 4 * i, NULL) == NULL)
mc_panic("pcc = 1, cpu unable to continue\n");
}
@@ -519,8 +524,8 @@ static void intel_machine_check(struct c
/* Pick one CPU to clear MCIP */
if (!test_and_set_bool(mce_process_lock)) {
- rdmsrl(MSR_IA32_MCG_STATUS, gstatus);
- wrmsrl(MSR_IA32_MCG_STATUS, gstatus & ~MCG_STATUS_MCIP);
+ mca_rdmsrl(MSR_IA32_MCG_STATUS, gstatus);
+ mca_wrmsrl(MSR_IA32_MCG_STATUS, gstatus & ~MCG_STATUS_MCIP);
if (worst >= 3) {
printk(KERN_WARNING "worst=3 should have caused RESET\n");
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