# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1226593868 0
# Node ID a0910b1b5ec0c938f1c46437df6c28cbeff52c68
# Parent d44ad6db638c1308e5ee4a47509769c3cccbe1e8
x86: don't disable MSI in order to mask an IRQ
... as that's not really correct, and there are devices which can't
even cope with that. Instead, check whether an MSI IRQ can be masked,
and if it can't, treat it just like a level triggered IO-APIC IRQ.
There's one other bug fix in here, correcting an off-by-one error on
the entry_nr range check in __pci_enable_msix().
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxxxx>
---
xen/arch/x86/irq.c | 11 ++++++++---
xen/arch/x86/msi.c | 11 ++++++++---
xen/include/asm-x86/msi.h | 2 ++
3 files changed, 18 insertions(+), 6 deletions(-)
diff -r d44ad6db638c -r a0910b1b5ec0 xen/arch/x86/irq.c
--- a/xen/arch/x86/irq.c Thu Nov 13 14:19:56 2008 +0000
+++ b/xen/arch/x86/irq.c Thu Nov 13 16:31:08 2008 +0000
@@ -463,12 +463,17 @@ int pirq_acktype(struct domain *d, int i
/*
* Edge-triggered IO-APIC and LAPIC interrupts need no final
* acknowledgement: we ACK early during interrupt processing.
- * MSIs are treated as edge-triggered interrupts.
*/
if ( !strcmp(desc->handler->typename, "IO-APIC-edge") ||
- !strcmp(desc->handler->typename, "local-APIC-edge") ||
- !strcmp(desc->handler->typename, "PCI-MSI") )
+ !strcmp(desc->handler->typename, "local-APIC-edge") )
return ACKTYPE_NONE;
+
+ /*
+ * MSIs are treated as edge-triggered interrupts, except
+ * when there is no proper way to mask them.
+ */
+ if ( desc->handler == &pci_msi_type )
+ return msi_maskable_irq(desc->msi_desc) ? ACKTYPE_NONE : ACKTYPE_EOI;
/*
* Level-triggered IO-APIC interrupts need to be acknowledged on the CPU
diff -r d44ad6db638c -r a0910b1b5ec0 xen/arch/x86/msi.c
--- a/xen/arch/x86/msi.c Thu Nov 13 14:19:56 2008 +0000
+++ b/xen/arch/x86/msi.c Thu Nov 13 16:31:08 2008 +0000
@@ -298,6 +298,13 @@ static void msix_flush_writes(unsigned i
}
}
+int msi_maskable_irq(const struct msi_desc *entry)
+{
+ BUG_ON(!entry);
+ return entry->msi_attrib.type != PCI_CAP_ID_MSI
+ || entry->msi_attrib.maskbit;
+}
+
static void msi_set_mask_bit(unsigned int irq, int flag)
{
struct msi_desc *entry = irq_desc[irq].msi_desc;
@@ -318,8 +325,6 @@ static void msi_set_mask_bit(unsigned in
mask_bits &= ~(1);
mask_bits |= flag;
pci_conf_write32(bus, slot, func, pos, mask_bits);
- } else {
- msi_set_enable(entry->dev, !flag);
}
break;
case PCI_CAP_ID_MSIX:
@@ -649,7 +654,7 @@ static int __pci_enable_msix(struct msi_
pos = pci_find_cap_offset(msi->bus, slot, func, PCI_CAP_ID_MSIX);
control = pci_conf_read16(msi->bus, slot, func, msi_control_reg(pos));
nr_entries = multi_msix_capable(control);
- if (msi->entry_nr > nr_entries)
+ if (msi->entry_nr >= nr_entries)
{
spin_unlock(&pdev->lock);
return -EINVAL;
diff -r d44ad6db638c -r a0910b1b5ec0 xen/include/asm-x86/msi.h
--- a/xen/include/asm-x86/msi.h Thu Nov 13 14:19:56 2008 +0000
+++ b/xen/include/asm-x86/msi.h Thu Nov 13 16:31:08 2008 +0000
@@ -96,6 +96,8 @@ struct msi_desc {
int remap_index; /* index in interrupt remapping table */
};
+
+int msi_maskable_irq(const struct msi_desc *);
/*
* Assume the maximum number of hot plug slots supported by the system is about
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