[Xen-changelog] [xen-unstable] [IA64] fix PAL call in physical mode.

[Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User Isaku Yamahata <yamahata@xxxxxxxxxxxxx>
# Date 1219658677 -32400
# Node ID 8f00ddcd1c4724f3859f9f1374340a69a595da65
# Parent  de736eefb6e123141cf064c9245477a455d4d95e
[IA64] fix PAL call in physical mode.

Now firmware code is mapped at its own virtual address space
which is same to Linux. So the calculation from virutal
address to physical address should be same to the linux one.
In practice firmware is located in low physical address area
so that masking 60 bit instead of 61 bits doesn't make difference.

I just checked and with the patch below,
xen/arch/ia64/linux-xen/pal.S becomes the same as
arch/ia64/kernel/pal.S from linux 2.6.21.

Signed-off-by: Simon Horman <horms@xxxxxxxxxxxx>
---
 xen/arch/ia64/linux-xen/pal.S |    8 --------
 1 files changed, 8 deletions(-)

diff -r de736eefb6e1 -r 8f00ddcd1c47 xen/arch/ia64/linux-xen/pal.S
--- a/xen/arch/ia64/linux-xen/pal.S     Mon Aug 25 19:04:37 2008 +0900
+++ b/xen/arch/ia64/linux-xen/pal.S     Mon Aug 25 19:04:37 2008 +0900
@@ -162,11 +162,7 @@ 1: {
        adds r8  = 1f-1b,r8             // calculate return address for call
        ;;
        mov loc4=ar.rsc                 // save RSE configuration
-#ifdef XEN
-       dep.z loc2=loc2,0,60            // convert pal entry point to physical
-#else // XEN
        dep.z loc2=loc2,0,61            // convert pal entry point to physical
-#endif // XEN
        tpa r8=r8                       // convert rp to physical
        ;;
        mov b7 = loc2                   // install target to branch reg
@@ -219,11 +215,7 @@ 1: {
        mov loc3 = psr                  // save psr
        ;;
        mov loc4=ar.rsc                 // save RSE configuration
-#ifdef XEN
-       dep.z loc2=loc2,0,60            // convert pal entry point to physical
-#else // XEN
        dep.z loc2=loc2,0,61            // convert pal entry point to physical
-#endif // XEN
        ;;
        mov ar.rsc=0                    // put RSE in enforced lazy, LE mode
        movl r16=PAL_PSR_BITS_TO_CLEAR

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