# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1213287464 -3600
# Node ID 8182f5158dc25a670e3b6695af245c3f6331e38a
# Parent 6f189de0f73d162900db9a848686d525595f9297
x86: Do not use HPET in Cx state management since dom0 may need RTC
IRQ routing. This makes C3 unusable for now.
Signed-off-by: Keir Fraser <keir.fraser@xxxxxxxxxx>
---
xen/arch/x86/acpi/cpu_idle.c | 24 ++++++++++++------------
xen/arch/x86/hpet.c | 5 +++++
xen/arch/x86/time.c | 2 +-
xen/include/asm-x86/hpet.h | 1 +
4 files changed, 19 insertions(+), 13 deletions(-)
diff -r 6f189de0f73d -r 8182f5158dc2 xen/arch/x86/acpi/cpu_idle.c
--- a/xen/arch/x86/acpi/cpu_idle.c Thu Jun 12 17:01:31 2008 +0100
+++ b/xen/arch/x86/acpi/cpu_idle.c Thu Jun 12 17:17:44 2008 +0100
@@ -724,8 +724,6 @@ static int check_cx(struct acpi_processo
static int check_cx(struct acpi_processor_power *power, xen_processor_cx_t *cx)
{
static int bm_check_flag;
- if ( cx == NULL )
- return -EINVAL;
switch ( cx->reg.space_id )
{
@@ -743,7 +741,7 @@ static int check_cx(struct acpi_processo
/* assume all logical cpu has the same support for mwait */
if ( acpi_processor_ffh_cstate_probe(cx) )
- return -EFAULT;
+ return -EINVAL;
}
break;
@@ -753,6 +751,10 @@ static int check_cx(struct acpi_processo
if ( cx->type == ACPI_STATE_C3 )
{
+ /* We must be able to use HPET in place of LAPIC timers. */
+ if ( !hpet_broadcast_is_available() )
+ return -EINVAL;
+
/* All the logic here assumes flags.bm_check is same across all CPUs */
if ( !bm_check_flag )
{
@@ -774,7 +776,7 @@ static int check_cx(struct acpi_processo
/* bus mastering control is necessary */
ACPI_DEBUG_PRINT((ACPI_DB_INFO,
"C3 support requires BM control\n"));
- return -1;
+ return -EINVAL;
}
else
{
@@ -795,7 +797,7 @@ static int check_cx(struct acpi_processo
ACPI_DEBUG_PRINT((ACPI_DB_INFO,
"Cache invalidation should work properly"
" for C3 to be enabled on SMP systems\n"));
- return -1;
+ return -EINVAL;
}
acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
}
@@ -804,14 +806,14 @@ static int check_cx(struct acpi_processo
return 0;
}
-static int set_cx(struct acpi_processor_power *acpi_power,
- xen_processor_cx_t *xen_cx)
+static void set_cx(
+ struct acpi_processor_power *acpi_power,
+ xen_processor_cx_t *xen_cx)
{
struct acpi_processor_cx *cx;
- /* skip unsupported acpi cstate */
- if ( check_cx(acpi_power, xen_cx) )
- return -EFAULT;
+ if ( check_cx(acpi_power, xen_cx) != 0 )
+ return;
cx = &acpi_power->states[xen_cx->type];
if ( !cx->valid )
@@ -825,8 +827,6 @@ static int set_cx(struct acpi_processor_
cx->power = xen_cx->power;
cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
-
- return 0;
}
int get_cpu_id(u8 acpi_id)
diff -r 6f189de0f73d -r 8182f5158dc2 xen/arch/x86/hpet.c
--- a/xen/arch/x86/hpet.c Thu Jun 12 17:01:31 2008 +0100
+++ b/xen/arch/x86/hpet.c Thu Jun 12 17:17:44 2008 +0100
@@ -235,6 +235,11 @@ void hpet_broadcast_exit(void)
reprogram_timer(per_cpu(timer_deadline, cpu));
}
+int hpet_broadcast_is_available(void)
+{
+ return (hpet_event.event_handler == handle_hpet_broadcast);
+}
+
int hpet_legacy_irq_tick(void)
{
if ( !hpet_event.event_handler )
diff -r 6f189de0f73d -r 8182f5158dc2 xen/arch/x86/time.c
--- a/xen/arch/x86/time.c Thu Jun 12 17:01:31 2008 +0100
+++ b/xen/arch/x86/time.c Thu Jun 12 17:17:44 2008 +0100
@@ -1012,7 +1012,7 @@ static int disable_pit_irq(void)
* If we do not rely on PIT CH0 then we can use HPET for one-shot
* timer emulation when entering deep C states.
*/
- hpet_broadcast_init();
+ /*hpet_broadcast_init(); XXX dom0 may rely on RTC interrupt delivery */
}
return 0;
diff -r 6f189de0f73d -r 8182f5158dc2 xen/include/asm-x86/hpet.h
--- a/xen/include/asm-x86/hpet.h Thu Jun 12 17:01:31 2008 +0100
+++ b/xen/include/asm-x86/hpet.h Thu Jun 12 17:17:44 2008 +0100
@@ -68,5 +68,6 @@ void hpet_broadcast_init(void);
void hpet_broadcast_init(void);
void hpet_broadcast_enter(void);
void hpet_broadcast_exit(void);
+int hpet_broadcast_is_available(void);
#endif /* __X86_HPET_H__ */
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