# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1211450642 -3600
# Node ID b259eebb0223e58eb9caf88f80b5aae1f12fc394
# Parent e48453f82d30ded8c7b4f454f7a9d37ea56d3fcb
hvmloader: Fix pci_setup() to not skip BAR remapping for virtual VGA devices.
Signed-off-by: Keir Fraser <keir.fraser@xxxxxxxxxx>
---
tools/firmware/hvmloader/hvmloader.c | 74 ++++++++++++++++-------------------
1 files changed, 35 insertions(+), 39 deletions(-)
diff -r e48453f82d30 -r b259eebb0223 tools/firmware/hvmloader/hvmloader.c
--- a/tools/firmware/hvmloader/hvmloader.c Thu May 22 10:41:49 2008 +0100
+++ b/tools/firmware/hvmloader/hvmloader.c Thu May 22 11:04:02 2008 +0100
@@ -198,11 +198,8 @@ static void pci_setup(void)
virtual_vga = VGA_cirrus;
break;
case 0x0680:
+ /* PIIX4 ACPI PM. Special device with special PCI config space. */
ASSERT((vendor_id == 0x8086) && (device_id == 0x7113));
- /*
- * PIIX4 ACPI PM. Special device with special PCI config space.
- * No ordinary BARs.
- */
pci_writew(devfn, 0x20, 0x0000); /* No smb bus IO enable */
pci_writew(devfn, 0x22, 0x0000);
pci_writew(devfn, 0x3c, 0x0009); /* Hardcoded IRQ9 */
@@ -213,42 +210,41 @@ static void pci_setup(void)
ASSERT((vendor_id == 0x8086) && (device_id == 0x7010));
pci_writew(devfn, 0x40, 0x8000); /* enable IDE0 */
pci_writew(devfn, 0x42, 0x8000); /* enable IDE1 */
- /* fall through */
- default:
- /* Default memory mappings. */
- for ( bar = 0; bar < 7; bar++ )
- {
- bar_reg = PCI_BASE_ADDRESS_0 + 4*bar;
- if ( bar == 6 )
- bar_reg = PCI_ROM_ADDRESS;
-
- bar_data = pci_readl(devfn, bar_reg);
- pci_writel(devfn, bar_reg, ~0);
- bar_sz = pci_readl(devfn, bar_reg);
- pci_writel(devfn, bar_reg, bar_data);
- if ( bar_sz == 0 )
- continue;
-
- bar_sz &= (((bar_data & PCI_BASE_ADDRESS_SPACE) ==
- PCI_BASE_ADDRESS_SPACE_MEMORY) ?
- PCI_BASE_ADDRESS_MEM_MASK :
- (PCI_BASE_ADDRESS_IO_MASK & 0xffff));
- bar_sz &= ~(bar_sz - 1);
-
- for ( i = 0; i < nr_bars; i++ )
- if ( bars[i].bar_sz < bar_sz )
- break;
-
- if ( i != nr_bars )
- memmove(&bars[i+1], &bars[i], (nr_bars-i) * sizeof(*bars));
-
- bars[i].devfn = devfn;
- bars[i].bar_reg = bar_reg;
- bars[i].bar_sz = bar_sz;
-
- nr_bars++;
- }
break;
+ }
+
+ /* Map the I/O memory and port resources. */
+ for ( bar = 0; bar < 7; bar++ )
+ {
+ bar_reg = PCI_BASE_ADDRESS_0 + 4*bar;
+ if ( bar == 6 )
+ bar_reg = PCI_ROM_ADDRESS;
+
+ bar_data = pci_readl(devfn, bar_reg);
+ pci_writel(devfn, bar_reg, ~0);
+ bar_sz = pci_readl(devfn, bar_reg);
+ pci_writel(devfn, bar_reg, bar_data);
+ if ( bar_sz == 0 )
+ continue;
+
+ bar_sz &= (((bar_data & PCI_BASE_ADDRESS_SPACE) ==
+ PCI_BASE_ADDRESS_SPACE_MEMORY) ?
+ PCI_BASE_ADDRESS_MEM_MASK :
+ (PCI_BASE_ADDRESS_IO_MASK & 0xffff));
+ bar_sz &= ~(bar_sz - 1);
+
+ for ( i = 0; i < nr_bars; i++ )
+ if ( bars[i].bar_sz < bar_sz )
+ break;
+
+ if ( i != nr_bars )
+ memmove(&bars[i+1], &bars[i], (nr_bars-i) * sizeof(*bars));
+
+ bars[i].devfn = devfn;
+ bars[i].bar_reg = bar_reg;
+ bars[i].bar_sz = bar_sz;
+
+ nr_bars++;
}
/* Map the interrupt. */
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