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[Xen-changelog] [xen-unstable] [SVM] handle MC threshold registers for B

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Subject: [Xen-changelog] [xen-unstable] [SVM] handle MC threshold registers for Barcelona
From: Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>
Date: Thu, 22 Nov 2007 12:01:01 -0800
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# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1195744247 0
# Node ID 5e85709e998bbd7c68a87a15466b7abc20f1e3ab
# Parent  66a7ff3557623f3a23e03254e7835541c540200a
[SVM] handle MC threshold registers for Barcelona
Signed-off-by: Christoph Egger <Christoph.Egger@xxxxxxx>
---
 xen/arch/x86/hvm/svm/svm.c |    2 ++
 1 files changed, 2 insertions(+)

diff -r 66a7ff355762 -r 5e85709e998b xen/arch/x86/hvm/svm/svm.c
--- a/xen/arch/x86/hvm/svm/svm.c        Thu Nov 22 14:16:25 2007 +0000
+++ b/xen/arch/x86/hvm/svm/svm.c        Thu Nov 22 15:10:47 2007 +0000
@@ -133,6 +133,7 @@ static enum handler_return long_mode_do_
         break;
 
     case MSR_IA32_MC4_MISC: /* Threshold register */
+    case MSR_F10_MC4_MISC1 ... MSR_F10_MC4_MISC3:
         /*
          * MCA/MCE: Threshold register is reported to be locked, so we ignore
          * all write accesses. This behaviour matches real HW, so guests should
@@ -1777,6 +1778,7 @@ static void svm_do_msr_access(
             break;
 
         case MSR_IA32_MC4_MISC: /* Threshold register */
+        case MSR_F10_MC4_MISC1 ... MSR_F10_MC4_MISC3:
             /*
              * MCA/MCE: We report that the threshold register is unavailable
              * for OS use (locked by the BIOS).

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