# HG changeset patch
# User Keir Fraser <keir@xxxxxxxxxxxxx>
# Date 1192631856 -3600
# Node ID 16f5672879c82532cdba3f4faf737a552030ccb9
# Parent 765600a13e4a05aa27c4c8810abf7882aad46406
x86: add option to display last exception records during register dumps
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxxxx>
Signed-off-by: Keir Fraser <keir@xxxxxxxxxxxxx>
---
xen/arch/x86/setup.c | 1
xen/arch/x86/smpboot.c | 2 -
xen/arch/x86/traps.c | 45 +++++++++++++++++++++++++++++++++++++++++--
xen/arch/x86/x86_32/traps.c | 10 ++++++++-
xen/arch/x86/x86_64/traps.c | 10 ++++++++-
xen/include/asm-x86/msr.h | 13 ++++++++++++
xen/include/asm-x86/system.h | 6 ++++-
7 files changed, 79 insertions(+), 8 deletions(-)
diff -r 765600a13e4a -r 16f5672879c8 xen/arch/x86/setup.c
--- a/xen/arch/x86/setup.c Wed Oct 17 15:19:05 2007 +0100
+++ b/xen/arch/x86/setup.c Wed Oct 17 15:37:36 2007 +0100
@@ -104,7 +104,6 @@ unsigned long xenheap_phys_start, xenhea
extern void arch_init_memory(void);
extern void init_IRQ(void);
-extern void trap_init(void);
extern void early_time_init(void);
extern void early_cpu_init(void);
extern void vesa_init(void);
diff -r 765600a13e4a -r 16f5672879c8 xen/arch/x86/smpboot.c
--- a/xen/arch/x86/smpboot.c Wed Oct 17 15:19:05 2007 +0100
+++ b/xen/arch/x86/smpboot.c Wed Oct 17 15:37:36 2007 +0100
@@ -492,8 +492,6 @@ void __devinit start_secondary(void *unu
*/
unsigned int cpu = booting_cpu;
- extern void percpu_traps_init(void);
-
set_processor_id(cpu);
set_current(idle_vcpu[cpu]);
this_cpu(curr_vcpu) = idle_vcpu[cpu];
diff -r 765600a13e4a -r 16f5672879c8 xen/arch/x86/traps.c
--- a/xen/arch/x86/traps.c Wed Oct 17 15:19:05 2007 +0100
+++ b/xen/arch/x86/traps.c Wed Oct 17 15:37:36 2007 +0100
@@ -76,6 +76,8 @@ char opt_nmi[10] = "fatal";
#endif
string_param("nmi", opt_nmi);
+DEFINE_PER_CPU(u32, ler_msr);
+
/* Master table, used by CPU0. */
idt_entry_t idt_table[IDT_ENTRIES];
@@ -111,6 +113,9 @@ unsigned long do_get_debugreg(int reg);
static int debug_stack_lines = 20;
integer_param("debug_stack_lines", debug_stack_lines);
+
+static int opt_ler;
+boolean_param("ler", opt_ler);
#ifdef CONFIG_X86_32
#define stack_words_per_line 8
@@ -2098,9 +2103,12 @@ asmlinkage int do_debug(struct cpu_user_
/* Save debug status register where guest OS can peek at it */
v->arch.guest_context.debugreg[6] = condition;
+ ler_enable();
+
return do_guest_trap(TRAP_debug, regs, 0);
out:
+ ler_enable();
return EXCRET_not_a_fault;
}
@@ -2146,10 +2154,43 @@ void set_tss_desc(unsigned int n, void *
#endif
}
+void __devinit percpu_traps_init(void)
+{
+ subarch_percpu_traps_init();
+
+ if ( !opt_ler )
+ return;
+
+ switch ( boot_cpu_data.x86_vendor )
+ {
+ case X86_VENDOR_INTEL:
+ switch ( boot_cpu_data.x86 )
+ {
+ case 6:
+ this_cpu(ler_msr) = MSR_IA32_LASTINTFROMIP;
+ break;
+ case 15:
+ this_cpu(ler_msr) = MSR_P4_LER_FROM_LIP;
+ break;
+ }
+ break;
+ case X86_VENDOR_AMD:
+ switch ( boot_cpu_data.x86 )
+ {
+ case 6:
+ case 15:
+ case 16:
+ this_cpu(ler_msr) = MSR_IA32_LASTINTFROMIP;
+ break;
+ }
+ break;
+ }
+
+ ler_enable();
+}
+
void __init trap_init(void)
{
- extern void percpu_traps_init(void);
-
/*
* Note that interrupt gates are always used, rather than trap gates. We
* must have interrupts disabled until DS/ES/FS/GS are saved because the
diff -r 765600a13e4a -r 16f5672879c8 xen/arch/x86/x86_32/traps.c
--- a/xen/arch/x86/x86_32/traps.c Wed Oct 17 15:19:05 2007 +0100
+++ b/xen/arch/x86/x86_32/traps.c Wed Oct 17 15:37:36 2007 +0100
@@ -104,6 +104,14 @@ void show_registers(struct cpu_user_regs
"ss: %04x cs: %04x\n",
fault_regs.ds, fault_regs.es, fault_regs.fs,
fault_regs.gs, fault_regs.ss, fault_regs.cs);
+
+ if ( this_cpu(ler_msr) && !guest_mode(regs) )
+ {
+ u32 from, to, hi;
+ rdmsr(this_cpu(ler_msr), from, hi);
+ rdmsr(this_cpu(ler_msr) + 1, to, hi);
+ printk("ler: %08x -> %08x\n", from, to);
+ }
}
void show_page_walk(unsigned long addr)
@@ -250,7 +258,7 @@ unsigned long do_iret(void)
return 0;
}
-void __devinit percpu_traps_init(void)
+void __devinit subarch_percpu_traps_init(void)
{
struct tss_struct *tss = &doublefault_tss;
asmlinkage int hypercall(void);
diff -r 765600a13e4a -r 16f5672879c8 xen/arch/x86/x86_64/traps.c
--- a/xen/arch/x86/x86_64/traps.c Wed Oct 17 15:19:05 2007 +0100
+++ b/xen/arch/x86/x86_64/traps.c Wed Oct 17 15:37:36 2007 +0100
@@ -112,6 +112,14 @@ void show_registers(struct cpu_user_regs
"ss: %04x cs: %04x\n",
fault_regs.ds, fault_regs.es, fault_regs.fs,
fault_regs.gs, fault_regs.ss, fault_regs.cs);
+
+ if ( this_cpu(ler_msr) && !guest_mode(regs) )
+ {
+ u64 from, to;
+ rdmsrl(this_cpu(ler_msr), from);
+ rdmsrl(this_cpu(ler_msr) + 1, to);
+ printk("ler: %016lx -> %016lx\n", from, to);
+ }
}
void show_page_walk(unsigned long addr)
@@ -302,7 +310,7 @@ static int write_stack_trampoline(
return 34;
}
-void __devinit percpu_traps_init(void)
+void __devinit subarch_percpu_traps_init(void)
{
char *stack_bottom, *stack;
int cpu = smp_processor_id();
diff -r 765600a13e4a -r 16f5672879c8 xen/include/asm-x86/msr.h
--- a/xen/include/asm-x86/msr.h Wed Oct 17 15:19:05 2007 +0100
+++ b/xen/include/asm-x86/msr.h Wed Oct 17 15:37:36 2007 +0100
@@ -105,6 +105,19 @@ static inline void write_efer(__u64 val)
wrmsrl(MSR_EFER, val);
}
+DECLARE_PER_CPU(u32, ler_msr);
+
+static inline void ler_enable(void)
+{
+ u64 debugctl;
+
+ if ( !this_cpu(ler_msr) )
+ return;
+
+ rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);
+ wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl | 1);
+}
+
#endif /* !__ASSEMBLY__ */
#endif /* __ASM_MSR_H */
diff -r 765600a13e4a -r 16f5672879c8 xen/include/asm-x86/system.h
--- a/xen/include/asm-x86/system.h Wed Oct 17 15:19:05 2007 +0100
+++ b/xen/include/asm-x86/system.h Wed Oct 17 15:37:36 2007 +0100
@@ -314,4 +314,8 @@ static inline int local_irq_is_enabled(v
#define BROKEN_ACPI_Sx 0x0001
#define BROKEN_INIT_AFTER_S1 0x0002
-#endif
+void trap_init(void);
+void percpu_traps_init(void);
+void subarch_percpu_traps_init(void);
+
+#endif
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