[Xen-changelog] [xen-unstable] hvm svm: Fix for BSOD when "migrating" from Intel to AMD.

[Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User kfraser@xxxxxxxxxxxxxxxxxxxxx
# Date 1181832897 -3600
# Node ID 912f7e312ec2a56c89ef5a949b6ecc72f5df74a6
# Parent  4d838167960694f1b9fcaec54590aef0e1f0a7ee
hvm svm: Fix for BSOD when "migrating" from Intel to AMD.

The Intel processor driver for Windows (XP and later at least) reads
an MSR that AMD doesn't have. This causes GP-fault in kernel mode,
which causes blue-screen-of-death on Windows. This prevents a
disk-image that was installed on Intel from starting on an AMD
processor.

This patch "fixes" the problem by allowing reads from the msr,
returning all zero's (which is a valid, if not particulary
meaningful, value for this register).

Signed-off-by: Mats Petersson <mats.petersson@xxxxxxx>
---
 xen/arch/x86/hvm/svm/svm.c |    9 +++++++++
 xen/include/asm-x86/msr.h  |    1 +
 2 files changed, 10 insertions(+)

diff -r 4d8381679606 -r 912f7e312ec2 xen/arch/x86/hvm/svm/svm.c
--- a/xen/arch/x86/hvm/svm/svm.c        Wed Jun 13 22:24:28 2007 +0100
+++ b/xen/arch/x86/hvm/svm/svm.c        Thu Jun 14 15:54:57 2007 +0100
@@ -2089,6 +2089,15 @@ static inline void svm_do_msr_access(
             msr_content = 1ULL << 61; /* MC4_MISC.Locked */
             break;
 
+        case MSR_IA32_EBC_FREQUENCY_ID:
+            /*
+             * This Intel-only register may be accessed if this HVM guest
+             * has been migrated from an Intel host. The value zero is not
+             * particularly meaningful, but at least avoids the guest crashing!
+             */
+            msr_content = 0;
+            break;
+
         default:
             if ( rdmsr_hypervisor_regs(ecx, &eax, &edx) ||
                  rdmsr_safe(ecx, eax, edx) == 0 )
diff -r 4d8381679606 -r 912f7e312ec2 xen/include/asm-x86/msr.h
--- a/xen/include/asm-x86/msr.h Wed Jun 13 22:24:28 2007 +0100
+++ b/xen/include/asm-x86/msr.h Thu Jun 14 15:54:57 2007 +0100
@@ -96,6 +96,7 @@ static inline void wrmsrl(unsigned int m
 #define MSR_IA32_TIME_STAMP_COUNTER     0x10
 #define MSR_IA32_PLATFORM_ID           0x17
 #define MSR_IA32_EBL_CR_POWERON                0x2a
+#define MSR_IA32_EBC_FREQUENCY_ID      0x2c
 
 #define MSR_IA32_APICBASE              0x1b
 #define MSR_IA32_APICBASE_BSP          (1<<8)

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