# HG changeset patch
# User kfraser@xxxxxxxxxxxxxxxxxxxxx
# Date 1172509510 0
# Node ID 6efc22cb9c847c1f67566eda3ece256293d1828d
# Parent d2a91b73899a3a2a40dec7762d8df86f45d583a0
Missing files from previous changeset.
Signed-off-by: Thomas Friebel <thomas.friebel@xxxxxxx>
---
tools/xentrace/formats | 48 ++++++++++++++++-------------------
tools/xentrace/xentrace.8 | 54 +++++++++++++++++++++++++---------------
tools/xentrace/xentrace.c | 4 +-
xen/include/asm-x86/hvm/trace.h | 44 ++++++++++++++++++++++++++++++++
4 files changed, 103 insertions(+), 47 deletions(-)
diff -r d2a91b73899a -r 6efc22cb9c84 tools/xentrace/formats
--- a/tools/xentrace/formats Mon Feb 26 17:04:39 2007 +0000
+++ b/tools/xentrace/formats Mon Feb 26 17:05:10 2007 +0000
@@ -16,29 +16,25 @@ 0x0002f00c CPU%(cpu)d %(tsc)d (+%(relt
0x0002f00c CPU%(cpu)d %(tsc)d (+%(reltsc)8d) t_timer_fn
0x0002f00d CPU%(cpu)d %(tsc)d (+%(reltsc)8d) dom_timer_fn
-0x00080001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMX_VMEXIT [ domid =
0x%(1)08x, eip = 0x%(2)08x, reason = 0x%(3)08x ]
-0x00084001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMX_INTR [ domid =
0x%(1)08x, trap = 0x%(2)08x, va = 0x%(3)08x ]
-
-0x00081001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_0 0x%(1)08x
0x%(2)08x 0x%(3)08x
-0x00082001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_0 0x%(1)08x
0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
-
-0x00081002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_1 0x%(1)08x
0x%(2)08x 0x%(3)08x
-0x00082002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_1 0x%(1)08x
0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
-
-0x00081003 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_2 0x%(1)08x
0x%(2)08x 0x%(3)08x
-0x00082003 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_2 0x%(1)08x
0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
-
-0x00081004 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_3 0x%(1)08x
0x%(2)08x 0x%(3)08x
-0x00082004 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_3 0x%(1)08x
0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
-
-0x00081005 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_4 0x%(1)08x
0x%(2)08x 0x%(3)08x
-0x00082005 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_4 0x%(1)08x
0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
-
-0x00081006 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_5 0x%(1)08x
0x%(2)08x 0x%(3)08x
-0x00082006 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_5 0x%(1)08x
0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
-
-0x00081007 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_6 0x%(1)08x
0x%(2)08x 0x%(3)08x
-0x00082007 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_6 0x%(1)08x
0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
-
-0x00081008 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT_7 0x%(1)08x
0x%(2)08x 0x%(3)08x
-0x00082008 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY_7 0x%(1)08x
0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
+0x00081001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMENTRY [ dom:vcpu =
0x%(1)08x ]
+0x00081002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMEXIT [ dom:vcpu =
0x%(1)08x, rIP = 0x%(2)08x, exitcode = 0x%(3)08x ]
+0x00082001 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) PF_XEN [ dom:vcpu =
0x%(1)08x, virt = 0x%(2)08x, errorcode = 0x%(3)02x ]
+0x00082002 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) PF_INJECT [ dom:vcpu =
0x%(1)08x, virt = 0x%(2)08x, errorcode = 0x%(3)02x ]
+0x00082003 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INJ_EXC [ dom:vcpu =
0x%(1)08x, vector = 0x%(2)02x, errorcode = 0x%(3)04x ]
+0x00082004 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INJ_VIRQ [ dom:vcpu =
0x%(1)08x, vector = 0x%(2)02x, fake = %(3)d ]
+0x00082005 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) REINJ_VIRQ [ dom:vcpu =
0x%(1)08x, vector = 0x%(2)02x ]
+0x00082006 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) IO_READ [ dom:vcpu =
0x%(1)08x, port = 0x%(2)04x, size = %(3)d ]
+0x00082007 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) IO_WRITE [ dom:vcpu =
0x%(1)08x, port = 0x%(2)04x, size = %(3)d ]
+0x00082008 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) CR_READ [ dom:vcpu =
0x%(1)08x, CR# = %(2)d, value = 0x%(3)08x ]
+0x00082009 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) CR_WRITE [ dom:vcpu =
0x%(1)08x, CR# = %(2)d, value = 0x%(3)08x ]
+0x0008200A CPU%(cpu)d %(tsc)d (+%(reltsc)8d) DR_READ [ dom:vcpu =
0x%(1)08x ]
+0x0008200B CPU%(cpu)d %(tsc)d (+%(reltsc)8d) DR_WRITE [ dom:vcpu =
0x%(1)08x ]
+0x0008200C CPU%(cpu)d %(tsc)d (+%(reltsc)8d) MSR_READ [ dom:vcpu =
0x%(1)08x, MSR# = 0x%(2)08x, value = 0x%(3)08x ]
+0x0008200D CPU%(cpu)d %(tsc)d (+%(reltsc)8d) MSR_WRITE [ dom:vcpu =
0x%(1)08x, MSR# = 0x%(2)08x, value = 0x%(3)08x ]
+0x0008200E CPU%(cpu)d %(tsc)d (+%(reltsc)8d) CPUID [ dom:vcpu =
0x%(1)08x, func = 0x%(2)08x, eax:ebx = 0x%(3)016x, ecx:edx = 0x%(4)016x ]
+0x0008200F CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INTR [ dom:vcpu =
0x%(1)08x, vector = 0x%(2)02x ]
+0x00082010 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) NMI [ dom:vcpu =
0x%(1)08x ]
+0x00082011 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) SMI [ dom:vcpu =
0x%(1)08x ]
+0x00082012 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) VMMCALL [ dom:vcpu =
0x%(1)08x, func = 0x%(2)08x ]
+0x00082013 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) HLT [ dom:vcpu =
0x%(1)08x, intpending = %(2)d ]
+0x00082014 CPU%(cpu)d %(tsc)d (+%(reltsc)8d) INVLPG [ dom:vcpu =
0x%(1)08x, virt = 0x%(2)08x, invlpga = %(3)d, asid = 0x%(4)02x ]
diff -r d2a91b73899a -r 6efc22cb9c84 tools/xentrace/xentrace.8
--- a/tools/xentrace/xentrace.8 Mon Feb 26 17:04:39 2007 +0000
+++ b/tools/xentrace/xentrace.8 Mon Feb 26 17:05:10 2007 +0000
@@ -1,4 +1,4 @@
-.TH XENTRACE 8 "11 March 2004" "Xen domain 0 utils"
+.TH XENTRACE 8 "22 February 2007" "Xen domain 0 utils"
.SH NAME
xentrace \- capture Xen trace buffer data
.SH SYNOPSIS
@@ -59,10 +59,10 @@ gathered by xentrace:
.PP
0x0001f000 TRC_GEN
0x0002f000 TRC_SCHED
- 0x0004f000 TRC_DOM0OP
- 0x0008f000 TRC_VMX
- 0x000af000 TRC_MEM
- 0xfffff000 TRC_ALL
+ 0x0004f000 TRC_DOM0OP
+ 0x0008f000 TRC_HVM
+ 0x0010f000 TRC_MEM
+ 0xfffff000 TRC_ALL
.SS Event Subclasses (More Masks)
@@ -71,10 +71,8 @@ gathered by xentrace:
.PP
\fIID\fP \fIDescription\fP
.PP
- 0x00081000 TRC_VMXEXIT
- 0x00082000 TRC_VMXTIMER
- 0x00084000 TRC_VMXINT
- 0x00088000 TRC_VMXIO
+ 0x00081000 TRC_HVM_ENTRYEXIT
+ 0x00082000 TRC_HVM_HANDLER
.SS Events
@@ -82,7 +80,8 @@ collects the following events from the t
collects the following events from the trace buffer:
.PP
\fIID\fP \fIDescription\fP
-.PP
+.PP
+ 0x0001f001 TRC_LOST_RECORDS
0x0002f001 TRC_SCHED_DOM_ADD
0x0002f002 TRC_SCHED_DOM_REM
0x0002f003 TRC_SCHED_SLEEP
@@ -99,16 +98,33 @@ collects the following events from the t
0x0002f014 TRC_SCHED_SWITCH_INFPREV
0x0002f015 TRC_SCHED_SWITCH_INFNEXT
- 0x000af001 TRC_MEM_PAGE_GRANT_MAP
- 0x000af002 TRC_MEM_PAGE_GRANT_UNMAP
- 0x000af003 TRC_MEM_PAGE_GRANT_TRANSFER
+ 0x00081001 TRC_HVM_VMENTRY
+ 0x00081002 TRC_HVM_VMEXIT
+ 0x00082001 TRC_HVM_PF_XEN
+ 0x00082002 TRC_HVM_PF_INJECT
+ 0x00082003 TRC_HVM_INJ_EXC
+ 0x00082004 TRC_HVM_INJ_VIRQ
+ 0x00082005 TRC_HVM_REINJ_VIRQ
+ 0x00082006 TRC_HVM_IO_READ
+ 0x00082007 TRC_HVM_IO_WRITE
+ 0x00082008 TRC_HVM_CR_READ
+ 0x00082009 TRC_HVM_CR_WRITE
+ 0x0008200A TRC_HVM_DR_READ
+ 0x0008200B TRC_HVM_DR_WRITE
+ 0x0008200C TRC_HVM_MSR_READ
+ 0x0008200D TRC_HVM_MSR_WRITE
+ 0x0008200E TRC_HVM_CPUID
+ 0x0008200F TRC_HVM_INTR
+ 0x00082010 TRC_HVM_NMI
+ 0x00082011 TRC_HVM_SMI
+ 0x00082012 TRC_HVM_VMMCALL
+ 0x00082013 TRC_HVM_HLT
+ 0x00082014 TRC_HVM_INVLPG
- 0x00081001 TRC_VMX_VMEXIT
- 0x00081002 TRC_VMX_VMENTRY
-
- 0x00082001 TRC_VMX_TIMER_INTR
-
- 0x00084001 TRC_VMX_INT
+ 0x0010f001 TRC_MEM_PAGE_GRANT_MAP
+ 0x0010f002 TRC_MEM_PAGE_GRANT_UNMAP
+ 0x0010f003 TRC_MEM_PAGE_GRANT_TRANSFER
+
.PP
.SH AUTHOR
diff -r d2a91b73899a -r 6efc22cb9c84 tools/xentrace/xentrace.c
--- a/tools/xentrace/xentrace.c Mon Feb 26 17:04:39 2007 +0000
+++ b/tools/xentrace/xentrace.c Mon Feb 26 17:05:10 2007 +0000
@@ -350,8 +350,8 @@ int parse_evtmask(char *arg, struct argp
setup->evt_mask |= TRC_SCHED;
} else if(strcmp(arg, "dom0op") == 0){
setup->evt_mask |= TRC_DOM0OP;
- } else if(strcmp(arg, "vmx") == 0){
- setup->evt_mask |= TRC_VMX;
+ } else if(strcmp(arg, "hvm") == 0){
+ setup->evt_mask |= TRC_HVM;
} else if(strcmp(arg, "all") == 0){
setup->evt_mask |= TRC_ALL;
} else {
diff -r d2a91b73899a -r 6efc22cb9c84 xen/include/asm-x86/hvm/trace.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/xen/include/asm-x86/hvm/trace.h Mon Feb 26 17:05:10 2007 +0000
@@ -0,0 +1,44 @@
+#ifndef __ASM_X86_HVM_TRACE_H__
+#define __ASM_X86_HVM_TRACE_H__
+
+#include <xen/trace.h>
+
+#define DO_TRC_HVM_VMENTRY 1
+#define DO_TRC_HVM_VMEXIT 1
+#define DO_TRC_HVM_PF_XEN 1
+#define DO_TRC_HVM_PF_INJECT 1
+#define DO_TRC_HVM_INJ_EXC 1
+#define DO_TRC_HVM_INJ_VIRQ 1
+#define DO_TRC_HVM_REINJ_VIRQ 1
+#define DO_TRC_HVM_IO_READ 1
+#define DO_TRC_HVM_IO_WRITE 1
+#define DO_TRC_HVM_CR_READ 1
+#define DO_TRC_HVM_CR_WRITE 1
+#define DO_TRC_HVM_DR_READ 1
+#define DO_TRC_HVM_DR_WRITE 1
+#define DO_TRC_HVM_MSR_READ 1
+#define DO_TRC_HVM_MSR_WRITE 1
+#define DO_TRC_HVM_CPUID 1
+#define DO_TRC_HVM_INTR 1
+#define DO_TRC_HVM_NMI 1
+#define DO_TRC_HVM_SMI 1
+#define DO_TRC_HVM_VMMCALL 1
+#define DO_TRC_HVM_HLT 1
+#define DO_TRC_HVM_INVLPG 1
+
+#define HVMTRACE_4D(evt, vcpu, d1, d2, d3, d4) \
+ do { \
+ if (DO_TRC_HVM_ ## evt) \
+ TRACE_5D( \
+ TRC_HVM_ ## evt, \
+ ((vcpu)->domain->domain_id<<16) + (vcpu)->vcpu_id, \
+ d1, d2, d3, d4 \
+ ); \
+ } while(0)
+
+#define HVMTRACE_3D(evt, vcpu, d1, d2, d3) HVMTRACE_4D(evt, vcpu, d1,
d2, d3, 0)
+#define HVMTRACE_2D(evt, vcpu, d1, d2) HVMTRACE_4D(evt, vcpu, d1,
d2, 0, 0)
+#define HVMTRACE_1D(evt, vcpu, d1) HVMTRACE_4D(evt, vcpu, d1,
0, 0, 0)
+#define HVMTRACE_0D(evt, vcpu) HVMTRACE_4D(evt, vcpu, 0,
0, 0, 0)
+
+#endif //__ASM_X86_HVM_TRACE_H__
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