# HG changeset patch
# User kfraser@xxxxxxxxxxxxxxxxxxxxx
# Date 1170802895 0
# Node ID e212203d7d34e2981e30bcc5178741f8eefb5fff
# Parent 3093bd26ae455fcc4b1c6fcbf7804e8bbedd0cde
[TPM] Set tcpa calls in the rombios and other fixes.
This patch places some tcpa calls into the rombios that had previously
not applied anymore or were not set.
Force the reads from MMIO memory locations that the compiler otherwise
optimizes away (-O2) if there was an immediate write to the same
memory location before.
Use #define'd constants wherever possible.
Fix all remaining compiler warnings.
Signed-off-by: Stefan Berger <stefanb@xxxxxxxxxx>
---
tools/firmware/rombios/32bit/tcgbios/tcgbios.c | 14 ++---
tools/firmware/rombios/32bit/tcgbios/tpm_drivers.c | 52 +++++++++++++--------
tools/firmware/rombios/32bit/util.h | 15 ++++++
tools/firmware/rombios/rombios.c | 13 ++++-
4 files changed, 65 insertions(+), 29 deletions(-)
diff -r 3093bd26ae45 -r e212203d7d34
tools/firmware/rombios/32bit/tcgbios/tcgbios.c
--- a/tools/firmware/rombios/32bit/tcgbios/tcgbios.c Tue Feb 06 22:59:35
2007 +0000
+++ b/tools/firmware/rombios/32bit/tcgbios/tcgbios.c Tue Feb 06 23:01:35
2007 +0000
@@ -146,7 +146,7 @@ static int tpm_driver_to_use = TPM_INVAL
static int tpm_driver_to_use = TPM_INVALID_DRIVER;
static
-uint32_t MA_IsTPMPresent()
+uint32_t MA_IsTPMPresent(void)
{
uint32_t rc = 0;
unsigned int i;
@@ -263,11 +263,11 @@ void tcpa_acpi_init(void)
{
struct acpi_20_rsdt *rsdt;
uint32_t length;
- struct acpi_20_tcpa *tcpa;
+ struct acpi_20_tcpa *tcpa = (void *)0;
uint16_t found = 0;
uint16_t rsdp_off;
uint16_t off;
- struct acpi_20_rsdp *rsdp;
+ struct acpi_20_rsdp *rsdp = (void *)0;
if (MA_IsTPMPresent() == 0) {
return;
@@ -732,8 +732,8 @@ void tcpa_measure_post(Bit32u from, Bit3
void tcpa_measure_post(Bit32u from, Bit32u to)
{
struct pcpes pcpes; /* PCClientPCREventStruc */
+ int len = to - from;
memset(&pcpes, 0x0, sizeof(pcpes));
- int len = to - from;
if (len > 0) {
sha1((unsigned char *)from,
@@ -986,7 +986,7 @@ uint32_t PassThroughToTPM32(struct pttti
{
uint32_t rc = 0;
uint8_t *cmd32;
- uint32_t resbuflen;
+ uint32_t resbuflen = 0;
if (TCG_IsShutdownPreBootInterface() != 0) {
rc = (TCG_PC_TPMERROR |
@@ -1277,9 +1277,7 @@ typedef struct _sha1_ctx {
} sha1_ctx;
-static inline uint32_t rol(val, rol)
- uint32_t val;
- uint16_t rol;
+static inline uint32_t rol(uint32_t val, uint16_t rol)
{
return (val << rol) | (val >> (32 - rol));
}
diff -r 3093bd26ae45 -r e212203d7d34
tools/firmware/rombios/32bit/tcgbios/tpm_drivers.c
--- a/tools/firmware/rombios/32bit/tcgbios/tpm_drivers.c Tue Feb 06
22:59:35 2007 +0000
+++ b/tools/firmware/rombios/32bit/tcgbios/tpm_drivers.c Tue Feb 06
23:01:35 2007 +0000
@@ -27,12 +27,27 @@
#include "tpm_drivers.h"
#include "tcgbios.h"
+#define STS_VALID (1 << 7) /* 0x80 */
+#define STS_COMMAND_READY (1 << 6) /* 0x40 */
+#define STS_TPM_GO (1 << 5) /* 0x20 */
+#define STS_DATA_AVAILABLE (1 << 4) /* 0x10 */
+#define STS_EXPECT (1 << 3) /* 0x08 */
+#define STS_RESPONSE_RETRY (1 << 1) /* 0x02 */
+
+#define ACCESS_TPM_REG_VALID_STS (1 << 7) /* 0x80 */
+#define ACCESS_ACTIVE_LOCALITY (1 << 5) /* 0x20 */
+#define ACCESS_BEEN_SEIZED (1 << 4) /* 0x10 */
+#define ACCESS_SEIZE (1 << 3) /* 0x08 */
+#define ACCESS_PENDING_REQUEST (1 << 2) /* 0x04 */
+#define ACCESS_REQUEST_USE (1 << 1) /* 0x02 */
+#define ACCESS_TPM_ESTABLISHMENT (1 << 0) /* 0x01 */
+
static uint32_t tis_wait_sts(uint8_t *addr, uint32_t time,
uint8_t mask, uint8_t expect)
{
uint32_t rc = 0;
while (time > 0) {
- uint8_t sts = addr[TPM_STS];
+ uint8_t sts = mmio_readb(&addr[TPM_STS]);
if ((sts & mask) == expect) {
rc = 1;
break;
@@ -45,16 +60,17 @@ static uint32_t tis_wait_sts(uint8_t *ad
static uint32_t tis_activate(uint32_t baseaddr)
{
- uint32_t rc = 0;
+ uint32_t rc = 1;
uint8_t *tis_addr = (uint8_t*)baseaddr;
uint8_t acc;
/* request access to locality */
- tis_addr[TPM_ACCESS] = 0x2;
+ tis_addr[TPM_ACCESS] = ACCESS_REQUEST_USE;
- acc = tis_addr[TPM_ACCESS];
- if ((acc & 0x20) != 0) {
- tis_addr[TPM_STS] = 0x40;
- rc = tis_wait_sts(tis_addr, 100, 0x40, 0x40);
+ acc = mmio_readb(&tis_addr[TPM_ACCESS]);
+ if ((acc & ACCESS_ACTIVE_LOCALITY) != 0) {
+ tis_addr[TPM_STS] = STS_COMMAND_READY;
+ rc = tis_wait_sts(tis_addr, 100,
+ STS_COMMAND_READY, STS_COMMAND_READY);
}
return rc;
}
@@ -64,8 +80,8 @@ uint32_t tis_ready(uint32_t baseaddr)
uint32_t rc = 0;
uint8_t *tis_addr = (uint8_t*)baseaddr;
- tis_addr[TPM_STS] = 0x40;
- rc = tis_wait_sts(tis_addr, 100, 0x40, 0x40);
+ tis_addr[TPM_STS] = STS_COMMAND_READY;
+ rc = tis_wait_sts(tis_addr, 100, STS_COMMAND_READY, STS_COMMAND_READY);
return rc;
}
@@ -81,8 +97,7 @@ uint32_t tis_senddata(uint32_t baseaddr,
uint16_t burst = 0;
uint32_t ctr = 0;
while (burst == 0 && ctr < 2000) {
- burst = (((uint16_t)tis_addr[TPM_STS+1]) ) +
- (((uint16_t)tis_addr[TPM_STS+2]) << 8);
+ burst = mmio_readw((uint16_t *)&tis_addr[TPM_STS+1]);
if (burst == 0) {
mssleep(1);
ctr++;
@@ -120,11 +135,11 @@ uint32_t tis_readresp(uint32_t baseaddr,
uint32_t sts;
while (offset < len) {
- buffer[offset] = tis_addr[TPM_DATA_FIFO];
+ buffer[offset] = mmio_readb(&tis_addr[TPM_DATA_FIFO]);
offset++;
- sts = tis_addr[TPM_STS];
+ sts = mmio_readb(&tis_addr[TPM_STS]);
/* data left ? */
- if ((sts & 0x10) == 0) {
+ if ((sts & STS_DATA_AVAILABLE) == 0) {
break;
}
}
@@ -136,7 +151,7 @@ uint32_t tis_waitdatavalid(uint32_t base
{
uint8_t *tis_addr = (uint8_t*)baseaddr;
uint32_t rc = 0;
- if (tis_wait_sts(tis_addr, 1000, 0x80, 0x80) == 0) {
+ if (tis_wait_sts(tis_addr, 1000, STS_VALID, STS_VALID) == 0) {
rc = TCG_NO_RESPONSE;
}
return rc;
@@ -146,8 +161,9 @@ uint32_t tis_waitrespready(uint32_t base
{
uint32_t rc = 0;
uint8_t *tis_addr = (uint8_t*)baseaddr;
- tis_addr[TPM_STS] = 0x20;
- if (tis_wait_sts(tis_addr, timeout, 0x10, 0x10) == 0) {
+ tis_addr[TPM_STS] = STS_TPM_GO;
+ if (tis_wait_sts(tis_addr, timeout,
+ STS_DATA_AVAILABLE, STS_DATA_AVAILABLE) == 0) {
rc = TCG_NO_RESPONSE;
}
return rc;
@@ -158,7 +174,7 @@ uint32_t tis_probe(uint32_t baseaddr)
{
uint32_t rc = 0;
uint8_t *tis_addr = (uint8_t*)baseaddr;
- uint32_t didvid = *(uint32_t*)&tis_addr[TPM_DID_VID];
+ uint32_t didvid = mmio_readl((uint32_t *)&tis_addr[TPM_DID_VID]);
if ((didvid != 0) && (didvid != 0xffffffff)) {
rc = 1;
}
diff -r 3093bd26ae45 -r e212203d7d34 tools/firmware/rombios/32bit/util.h
--- a/tools/firmware/rombios/32bit/util.h Tue Feb 06 22:59:35 2007 +0000
+++ b/tools/firmware/rombios/32bit/util.h Tue Feb 06 23:01:35 2007 +0000
@@ -24,5 +24,20 @@ void uuid_to_string(char *dest, uint8_t
void uuid_to_string(char *dest, uint8_t *uuid);
int printf(const char *fmt, ...);
+static inline uint8_t mmio_readb(uint8_t *addr)
+{
+ return *(volatile uint8_t *)addr;
+}
+
+static inline uint16_t mmio_readw(uint16_t *addr)
+{
+ return *(volatile uint16_t *)addr;
+}
+
+static inline uint32_t mmio_readl(uint32_t *addr)
+{
+ return *(volatile uint32_t *)addr;
+}
+
#endif
diff -r 3093bd26ae45 -r e212203d7d34 tools/firmware/rombios/rombios.c
--- a/tools/firmware/rombios/rombios.c Tue Feb 06 22:59:35 2007 +0000
+++ b/tools/firmware/rombios/rombios.c Tue Feb 06 23:01:35 2007 +0000
@@ -5722,9 +5722,6 @@ int13_cdemu(DS, ES, DI, SI, BP, SP, BX,
goto int13_fail;
}
-#if BX_TCGBIOS
- tcpa_ipl((Bit32u)bootseg); /* specs: 8.2.3 steps 4 and 5 */
-#endif
switch (GET_AH()) {
@@ -7741,6 +7738,10 @@ ASM_END
}
}
+#if BX_TCGBIOS
+ tcpa_add_bootdevice((Bit32u)0L, (Bit32u)bootdrv);
+#endif
+
/* Canonicalize bootseg:bootip */
bootip = (bootseg & 0x0fff) << 4;
bootseg &= 0xf000;
@@ -7760,6 +7761,9 @@ ASM_END
bootdrv = (Bit8u)(status>>8);
bootseg = read_word(ebda_seg,&EbdaData->cdemu.load_segment);
/* Canonicalize bootseg:bootip */
+#if BX_TCGBIOS
+ tcpa_add_bootdevice((Bit32u)1L, (Bit32u)0L);
+#endif
bootip = (bootseg & 0x0fff) << 4;
bootseg &= 0xf000;
break;
@@ -7773,6 +7777,9 @@ ASM_END
default: return;
}
+#if BX_TCGBIOS
+ tcpa_ipl((Bit32u)bootseg); /* specs: 8.2.3 steps 4 and 5 */
+#endif
/* Debugging info */
printf("Booting from %x:%x\n", bootseg, bootip);
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