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[Xen-changelog] [xen-unstable] [IA64] Complete fpswa handler retry mecha

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Subject: [Xen-changelog] [xen-unstable] [IA64] Complete fpswa handler retry mechanism
From: Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>
Date: Thu, 26 Oct 2006 12:10:21 +0000
Delivery-date: Thu, 26 Oct 2006 05:11:23 -0700
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# HG changeset patch
# User awilliam@xxxxxxxxxxx
# Node ID 9da2d9b48ff8711516a07f7a06120abedb4e24b2
# Parent  7b250cf49e504180d5b51a92e66de80c5e81e13b
[IA64] Complete fpswa handler retry mechanism

When handling fpswa fault, Xen needs to fetch opcode, it may fail.
This patch finishes retry mechanism.

Signed-off-by: Anthony Xu <anthony.xu@xxxxxxxxx>
---
 xen/arch/ia64/vmx/vmx_process.c |   21 ++++++++++++++++-----
 xen/arch/ia64/vmx/vmx_vcpu.c    |   15 +++++++++++++++
 xen/include/asm-ia64/ia64_int.h |    4 +++-
 xen/include/asm-ia64/vmx_vcpu.h |    1 +
 4 files changed, 35 insertions(+), 6 deletions(-)

diff -r 7b250cf49e50 -r 9da2d9b48ff8 xen/arch/ia64/vmx/vmx_process.c
--- a/xen/arch/ia64/vmx/vmx_process.c   Sun Sep 24 14:55:57 2006 -0600
+++ b/xen/arch/ia64/vmx/vmx_process.c   Tue Sep 26 16:15:45 2006 -0600
@@ -81,6 +81,7 @@ void vmx_reflect_interruption(UINT64 ifa
 void vmx_reflect_interruption(UINT64 ifa,UINT64 isr,UINT64 iim,
      UINT64 vector,REGS *regs)
 {
+    UINT64 status;
     VCPU *vcpu = current;
     UINT64 vpsr = VCPU(vcpu, vpsr);
     vector=vec2off[vector];
@@ -89,13 +90,23 @@ void vmx_reflect_interruption(UINT64 ifa
     }
     else{ // handle fpswa emulation
         // fp fault
-        if(vector == IA64_FP_FAULT_VECTOR && !handle_fpu_swa(1, regs, isr)){
-            vmx_vcpu_increment_iip(vcpu);
-            return;
+        if (vector == IA64_FP_FAULT_VECTOR) {
+            status = handle_fpu_swa(1, regs, isr);
+            if (!status) {
+                vmx_vcpu_increment_iip(vcpu);
+                return;
+            } else if (IA64_RETRY == status)
+                return;
         }
         //fp trap
-        else if(vector == IA64_FP_TRAP_VECTOR && !handle_fpu_swa(0, regs, 
isr)){
-            return; 
+        else if (vector == IA64_FP_TRAP_VECTOR) {
+            status = handle_fpu_swa(0, regs, isr);
+            if (!status)
+                return;
+            else if (IA64_RETRY == status) {
+                vmx_vcpu_decrement_iip(vcpu);
+                return;
+            }
         }
     }
     VCPU(vcpu,isr)=isr;
diff -r 7b250cf49e50 -r 9da2d9b48ff8 xen/arch/ia64/vmx/vmx_vcpu.c
--- a/xen/arch/ia64/vmx/vmx_vcpu.c      Sun Sep 24 14:55:57 2006 -0600
+++ b/xen/arch/ia64/vmx/vmx_vcpu.c      Tue Sep 26 16:15:45 2006 -0600
@@ -172,6 +172,21 @@ IA64FAULT vmx_vcpu_increment_iip(VCPU *v
 }
 
 
+IA64FAULT vmx_vcpu_decrement_iip(VCPU *vcpu)
+{
+    REGS *regs = vcpu_regs(vcpu);
+    IA64_PSR *ipsr = (IA64_PSR *)&regs->cr_ipsr;
+    
+    if (ipsr->ri == 0) {
+        ipsr->ri = 2;
+        regs->cr_iip -= 16;
+    } else {
+        ipsr->ri--;
+    }
+    return (IA64_NO_FAULT);
+}
+
+
 IA64FAULT vmx_vcpu_cover(VCPU *vcpu)
 {
     REGS *regs = vcpu_regs(vcpu);
diff -r 7b250cf49e50 -r 9da2d9b48ff8 xen/include/asm-ia64/ia64_int.h
--- a/xen/include/asm-ia64/ia64_int.h   Sun Sep 24 14:55:57 2006 -0600
+++ b/xen/include/asm-ia64/ia64_int.h   Tue Sep 26 16:15:45 2006 -0600
@@ -36,7 +36,9 @@
 #define        IA64_NO_FAULT           0x0000
 #define IA64_FAULT                     0x0001
 #define        IA64_RFI_IN_PROGRESS    0x0002
-#define IA64_RETRY              0x0003
+// To avoid conflicting with return value of handle_fpu_swa()
+// set IA64_RETRY to -0x000f 
+#define IA64_RETRY             (-0x000f)
 #define IA64_FORCED_IFA         0x0004
 #define IA64_USE_TLB           0x0005
 #define        IA64_ILLOP_FAULT        (IA64_GENEX_VECTOR | 0x00)
diff -r 7b250cf49e50 -r 9da2d9b48ff8 xen/include/asm-ia64/vmx_vcpu.h
--- a/xen/include/asm-ia64/vmx_vcpu.h   Sun Sep 24 14:55:57 2006 -0600
+++ b/xen/include/asm-ia64/vmx_vcpu.h   Tue Sep 26 16:15:45 2006 -0600
@@ -114,6 +114,7 @@ extern void memwrite_p(VCPU *vcpu, u64 *
 extern void memwrite_p(VCPU *vcpu, u64 *src, u64 *dest, size_t s);
 extern void vcpu_load_kernel_regs(VCPU *vcpu);
 extern IA64FAULT vmx_vcpu_increment_iip(VCPU *vcpu);
+extern IA64FAULT vmx_vcpu_decrement_iip(VCPU *vcpu);
 extern void vmx_switch_rr7(unsigned long ,shared_info_t*,void *,void *,void *);
 
 extern void dtlb_fault (VCPU *vcpu, u64 vadr);

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