[Xen-changelog] [xen-unstable] [XEN][HVM] Initialise the ELCR to level triggered mode from pic_init1.

[Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User Steven Smith <ssmith@xxxxxxxxxxxxx>
# Node ID 9e24cd7951ead9088e262de42bd9aa7f5cbd9747
# Parent  c81eb1ccdce5f5ef8059deda71dc11b43c8687bb
[XEN][HVM] Initialise the ELCR to level triggered mode from pic_init1.
This should really be done from the BIOS, but since it isn't, work around
it from here.

Signed-off-by: Steven Smith <sos22@xxxxxxxxx>
---
 xen/arch/x86/hvm/i8259.c |    8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)

diff -r c81eb1ccdce5 -r 9e24cd7951ea xen/arch/x86/hvm/i8259.c
--- a/xen/arch/x86/hvm/i8259.c  Sun Sep 24 10:14:17 2006 +0100
+++ b/xen/arch/x86/hvm/i8259.c  Mon Sep 25 09:26:51 2006 +0100
@@ -447,6 +447,10 @@ static void pic_init1(int io_addr, int e
     ASSERT(spin_is_locked(&s->pics_state->lock));
 
     pic_reset(s);
+
+    /* XXX We set the ELCR to level triggered here, but that should
+       really be done by the BIOS, and only for PCI IRQs. */
+    s->elcr = 0xff & s->elcr_mask;
 }
 
 void pic_init(struct hvm_virpic *s, void (*irq_request)(void *, int),
@@ -458,12 +462,12 @@ void pic_init(struct hvm_virpic *s, void
     spin_lock_init(&s->lock);
     s->pics[0].pics_state = s;
     s->pics[1].pics_state = s;
+    s->pics[0].elcr_mask = 0xf8;
+    s->pics[1].elcr_mask = 0xde;
     spin_lock_irqsave(&s->lock, flags);
     pic_init1(0x20, 0x4d0, &s->pics[0]);
     pic_init1(0xa0, 0x4d1, &s->pics[1]);
     spin_unlock_irqrestore(&s->lock, flags);
-    s->pics[0].elcr_mask = 0xf8;
-    s->pics[1].elcr_mask = 0xde;
     s->irq_request = irq_request;
     s->irq_request_opaque = irq_request_opaque;
 }

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