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[Xen-changelog] [xen-unstable] [IA64] resolve VTI address wrap issue

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Subject: [Xen-changelog] [xen-unstable] [IA64] resolve VTI address wrap issue
From: Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>
Date: Wed, 30 Aug 2006 22:10:21 +0000
Delivery-date: Wed, 30 Aug 2006 15:12:14 -0700
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# HG changeset patch
# User awilliam@xxxxxxxxxxx
# Node ID 45cd042014955fdd3449e67690e0f6d792d2c672
# Parent  e6eede7648ee7970aaecd28060093edfb7333f6b
[IA64] resolve VTI address wrap issue

This patch resolves the address wrap issue in vtlb_purge and vhpt_purge

Signed-off-by: Anthony Xu <anthony.xu@xxxxxxxxx>
---
 xen/arch/ia64/vmx/vtlb.c |   40 ++++++++++++++++++++--------------------
 1 files changed, 20 insertions(+), 20 deletions(-)

diff -r e6eede7648ee -r 45cd04201495 xen/arch/ia64/vmx/vtlb.c
--- a/xen/arch/ia64/vmx/vtlb.c  Wed Aug 16 09:18:16 2006 -0600
+++ b/xen/arch/ia64/vmx/vtlb.c  Wed Aug 16 10:21:13 2006 -0600
@@ -245,7 +245,6 @@ u64 guest_vhpt_lookup(u64 iha, u64 *pte)
     return ret;
 }
 
-
 /*
  *  purge software guest tlb
  */
@@ -253,29 +252,29 @@ void vtlb_purge(VCPU *v, u64 va, u64 ps)
 void vtlb_purge(VCPU *v, u64 va, u64 ps)
 {
     thash_data_t *cur;
-    u64 start, end, curadr, size, psbits, tag, def_size;
+    u64 start, curadr, size, psbits, tag, rr_ps, num;
     ia64_rr vrr;
     thash_cb_t *hcb = &v->arch.vtlb;
+
     vcpu_get_rr(v, va, &vrr.rrval);
     psbits = VMX(v, psbits[(va >> 61)]);
-    size = PSIZE(ps);
-    start = va & (-size);
-    end = start + size;
+    start = va & ~((1UL << ps) - 1);
     while (psbits) {
         curadr = start;
-        ps = __ffs(psbits);
-        psbits &= ~(1UL << ps);
-        def_size = PSIZE(ps);
-        vrr.ps = ps;
-        /* Be careful about overflow.  */
-        while (curadr < end && curadr >= start) {
+        rr_ps = __ffs(psbits);
+        psbits &= ~(1UL << rr_ps);
+        num = 1UL << ((ps < rr_ps) ? 0 : (ps - rr_ps));
+        size = PSIZE(rr_ps);
+        vrr.ps = rr_ps;
+        while (num) {
             cur = vsa_thash(hcb->pta, curadr, vrr.rrval, &tag);
             while (cur) {
-                if (cur->etag == tag && cur->ps == ps)
+                if (cur->etag == tag && cur->ps == rr_ps)
                     cur->etag = 1UL << 63;
                 cur = cur->next;
             }
-            curadr += def_size;
+            curadr += size;
+            num--;
         }
     }
 }
@@ -288,14 +287,14 @@ static void vhpt_purge(VCPU *v, u64 va, 
 {
     //thash_cb_t *hcb = &v->arch.vhpt;
     thash_data_t *cur;
-    u64 start, end, size, tag;
+    u64 start, size, tag, num;
     ia64_rr rr;
-    size = PSIZE(ps);
-    start = va & (-size);
-    end = start + size;
-    rr.rrval = ia64_get_rr(va);
-    size = PSIZE(rr.ps);    
-    while(start < end){
+    
+    start = va & ~((1UL << ps) - 1);
+    rr.rrval = ia64_get_rr(va);  
+    size = PSIZE(rr.ps);
+    num = 1UL << ((ps < rr.ps) ? 0 : (ps - rr.ps));
+    while (num) {
         cur = (thash_data_t *)ia64_thash(start);
         tag = ia64_ttag(start);
         while (cur) {
@@ -304,6 +303,7 @@ static void vhpt_purge(VCPU *v, u64 va, 
             cur = cur->next;
         }
         start += size;
+        num--;
     }
     machine_tlb_purge(va, ps);
 }

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